From 16271377e2a00c2cd416ec21e5a21272e9f805ed Mon Sep 17 00:00:00 2001
From: BIGTREETECH <38851044+bigtreetech@users.noreply.github.com>
Date: Sat, 12 Mar 2022 08:23:18 +0800
Subject: [PATCH] =?UTF-8?q?=F0=9F=A7=91=E2=80=8D=F0=9F=92=BB=20STM32G0Bx?=
=?UTF-8?q?=20:=20Use=20PLLQ=20for=20USB=20clock=20(#23870)?=
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---
.../variant_MARLIN_STM32G0B1RE.cpp | 29 ++++++++++++-------
1 file changed, 19 insertions(+), 10 deletions(-)
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/variant_MARLIN_STM32G0B1RE.cpp b/buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/variant_MARLIN_STM32G0B1RE.cpp
index e53fb4182c..8af7150dc7 100644
--- a/buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/variant_MARLIN_STM32G0B1RE.cpp
+++ b/buildroot/share/PlatformIO/variants/MARLIN_G0B1RE/variant_MARLIN_STM32G0B1RE.cpp
@@ -115,11 +115,11 @@ extern "C" {
* AHB Prescaler = 1
* APB1 Prescaler = 1
* PLL_M = 1
- * PLL_N = 16
- * PLL_R = 2
+ * PLL_N = 24
+ * PLL_R = 3
* PLL_P = 2
- * PLL_Q = 2
- * USB(Hz) = 48000000 (HSI48M)
+ * PLL_Q = 4
+ * USB(Hz) = 48000000 (PLLQ)
* @param None
* @retval None
*/
@@ -129,22 +129,31 @@ WEAK void SystemClock_Config(void)
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+ // Reset clock registers (in case bootloader has changed them)
+ RCC->CR |= RCC_CR_HSION;
+ while (!(RCC->CR & RCC_CR_HSIRDY))
+ ;
+ RCC->CFGR = 0x00000000;
+ RCC->CR = RCC_CR_HSION;
+ while (RCC->CR & RCC_CR_PLLRDY)
+ ;
+ RCC->PLLCFGR = 0x00001000;
+
/** Configure the main internal regulator output voltage
*/
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_HSI48;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
- RCC_OscInitStruct.PLL.PLLN = 16;
+ RCC_OscInitStruct.PLL.PLLN = 24;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
- RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
@@ -164,7 +173,7 @@ WEAK void SystemClock_Config(void)
/** Initializes the peripherals clocks
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
- PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+ PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();