From 509227fd805f98697c25cf851010e372509c5009 Mon Sep 17 00:00:00 2001
From: Bob-the-Kuhn <bob.kuhn@att.net>
Date: Fri, 23 Mar 2018 09:37:58 -0500
Subject: [PATCH] change to mode 0
---
Marlin/src/HAL/HAL_DUE/HAL_spi_Due.cpp | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Marlin/src/HAL/HAL_DUE/HAL_spi_Due.cpp b/Marlin/src/HAL/HAL_DUE/HAL_spi_Due.cpp
index 3ceb7a6fef..2de71e3070 100644
--- a/Marlin/src/HAL/HAL_DUE/HAL_spi_Due.cpp
+++ b/Marlin/src/HAL/HAL_DUE/HAL_spi_Due.cpp
@@ -825,6 +825,11 @@
#else // U8G compatible hardware SPI
+ #define SPI_MODE_0_DUE_HW 2 // DUE CPHA control bit is inverted
+ #define SPI_MODE_1_DUE_HW 3
+ #define SPI_MODE_2_DUE_HW 0
+ #define SPI_MODE_3_DUE_HW 1
+
void spiInit(uint8_t spiRate = 6 ) { // default to slowest rate if not specified)
// 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
int spiDueDividors[] = { 10, 21, 42, 84, 168, 255, 255 };
@@ -848,7 +853,7 @@
SPI0->SPI_MR = SPI_MR_MSTR | SPI_MR_PCSDEC | SPI_MR_MODFDIS;
/* SPI mode 0, 8 Bit data transfer, baud rate */
- SPI0->SPI_CSR[0] = SPI_CSR_SCBR(spiDueDividors[spiRate]) | 1;
+ SPI0->SPI_CSR[0] = SPI_CSR_SCBR(spiDueDividors[spiRate]) | SPI_MODE_0_DUE_HW;
}
static uint8_t spiTransfer(uint8_t data) {