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📝 kHz => KHz

This commit is contained in:
Scott Lahteine 2022-01-10 19:49:03 -06:00
parent 476028d476
commit 02b29c0fec
20 changed files with 36 additions and 36 deletions

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@ -561,7 +561,7 @@
* FAST_PWM_FAN_FREQUENCY * FAST_PWM_FAN_FREQUENCY
* Set this to your desired frequency. * Set this to your desired frequency.
* For AVR, if left undefined this defaults to F = F_CPU/(2*255*1) * For AVR, if left undefined this defaults to F = F_CPU/(2*255*1)
* i.e., F = 31.4kHz on 16MHz microcontrollers or F = 39.2kHz on 20MHz microcontrollers. * i.e., F = 31.4KHz on 16MHz microcontrollers or F = 39.2KHz on 20MHz microcontrollers.
* For non AVR, if left undefined this defaults to F = 1Khz. * For non AVR, if left undefined this defaults to F = 1Khz.
* This F value is only to protect the hardware from an absence of configuration * This F value is only to protect the hardware from an absence of configuration
* and not to complete it when users are not aware that the frequency must be specifically set to support the target board. * and not to complete it when users are not aware that the frequency must be specifically set to support the target board.
@ -1179,7 +1179,7 @@
/** /**
* Adaptive Step Smoothing increases the resolution of multi-axis moves, particularly at step frequencies * Adaptive Step Smoothing increases the resolution of multi-axis moves, particularly at step frequencies
* below 1kHz (for AVR) or 10kHz (for ARM), where aliasing between axes in multi-axis moves causes audible * below 1KHz (for AVR) or 10KHz (for ARM), where aliasing between axes in multi-axis moves causes audible
* vibration and surface artifacts. The algorithm adapts to provide the best possible step smoothing at the * vibration and surface artifacts. The algorithm adapts to provide the best possible step smoothing at the
* lowest stepping frequencies. * lowest stepping frequencies.
*/ */
@ -3419,14 +3419,14 @@
/** /**
* PHOTO_PULSES_US may need adjustment depending on board and camera model. * PHOTO_PULSES_US may need adjustment depending on board and camera model.
* Pin must be running at 48.4kHz. * Pin must be running at 48.4KHz.
* Be sure to use a PHOTOGRAPH_PIN which can rise and fall quick enough. * Be sure to use a PHOTOGRAPH_PIN which can rise and fall quick enough.
* (e.g., MKS SBase temp sensor pin was too slow, so used P1.23 on J8.) * (e.g., MKS SBase temp sensor pin was too slow, so used P1.23 on J8.)
* *
* Example pulse data for Nikon: https://bit.ly/2FKD0Aq * Example pulse data for Nikon: https://bit.ly/2FKD0Aq
* IR Wiring: https://git.io/JvJf7 * IR Wiring: https://git.io/JvJf7
*/ */
//#define PHOTO_PULSES_US { 2000, 27850, 400, 1580, 400, 3580, 400 } // (µs) Durations for each 48.4kHz oscillation //#define PHOTO_PULSES_US { 2000, 27850, 400, 1580, 400, 3580, 400 } // (µs) Durations for each 48.4KHz oscillation
#ifdef PHOTO_PULSES_US #ifdef PHOTO_PULSES_US
#define PHOTO_PULSE_DELAY_US 13 // (µs) Approximate duration of each HIGH and LOW pulse in the oscillation #define PHOTO_PULSE_DELAY_US 13 // (µs) Approximate duration of each HIGH and LOW pulse in the oscillation
#endif #endif

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@ -491,9 +491,9 @@
* 1 : 4 - 5 MHz * 1 : 4 - 5 MHz
* 2 : 2 - 2.5 MHz * 2 : 2 - 2.5 MHz
* 3 : 1 - 1.25 MHz * 3 : 1 - 1.25 MHz
* 4 : 500 - 625 kHz * 4 : 500 - 625 KHz
* 5 : 250 - 312 kHz * 5 : 250 - 312 KHz
* 6 : 125 - 156 kHz * 6 : 125 - 156 KHz
*/ */
void spiInit(uint8_t spiRate) { void spiInit(uint8_t spiRate) {
switch (spiRate) { switch (spiRate) {

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@ -62,7 +62,7 @@ const tTimerConfig timer_config[NUM_HARDWARE_TIMERS] = {
Timer_clock1: Prescaler 2 -> 42MHz Timer_clock1: Prescaler 2 -> 42MHz
Timer_clock2: Prescaler 8 -> 10.5MHz Timer_clock2: Prescaler 8 -> 10.5MHz
Timer_clock3: Prescaler 32 -> 2.625MHz Timer_clock3: Prescaler 32 -> 2.625MHz
Timer_clock4: Prescaler 128 -> 656.25kHz Timer_clock4: Prescaler 128 -> 656.25KHz
*/ */
void HAL_timer_start(const uint8_t timer_num, const uint32_t frequency) { void HAL_timer_start(const uint8_t timer_num, const uint32_t frequency) {

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@ -74,9 +74,9 @@ extern "C" {
//@{ //@{
enum genclk_source { enum genclk_source {
GENCLK_PCK_SRC_SLCK_RC = 0, //!< Internal 32kHz RC oscillator as PCK source clock GENCLK_PCK_SRC_SLCK_RC = 0, //!< Internal 32KHz RC oscillator as PCK source clock
GENCLK_PCK_SRC_SLCK_XTAL = 1, //!< External 32kHz crystal oscillator as PCK source clock GENCLK_PCK_SRC_SLCK_XTAL = 1, //!< External 32KHz crystal oscillator as PCK source clock
GENCLK_PCK_SRC_SLCK_BYPASS = 2, //!< External 32kHz bypass oscillator as PCK source clock GENCLK_PCK_SRC_SLCK_BYPASS = 2, //!< External 32KHz bypass oscillator as PCK source clock
GENCLK_PCK_SRC_MAINCK_4M_RC = 3, //!< Internal 4MHz RC oscillator as PCK source clock GENCLK_PCK_SRC_MAINCK_4M_RC = 3, //!< Internal 4MHz RC oscillator as PCK source clock
GENCLK_PCK_SRC_MAINCK_8M_RC = 4, //!< Internal 8MHz RC oscillator as PCK source clock GENCLK_PCK_SRC_MAINCK_8M_RC = 4, //!< Internal 8MHz RC oscillator as PCK source clock
GENCLK_PCK_SRC_MAINCK_12M_RC = 5, //!< Internal 12MHz RC oscillator as PCK source clock GENCLK_PCK_SRC_MAINCK_12M_RC = 5, //!< Internal 12MHz RC oscillator as PCK source clock

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@ -93,9 +93,9 @@ extern "C" {
//! \name Oscillator identifiers //! \name Oscillator identifiers
//@{ //@{
#define OSC_SLCK_32K_RC 0 //!< Internal 32kHz RC oscillator. #define OSC_SLCK_32K_RC 0 //!< Internal 32KHz RC oscillator.
#define OSC_SLCK_32K_XTAL 1 //!< External 32kHz crystal oscillator. #define OSC_SLCK_32K_XTAL 1 //!< External 32KHz crystal oscillator.
#define OSC_SLCK_32K_BYPASS 2 //!< External 32kHz bypass oscillator. #define OSC_SLCK_32K_BYPASS 2 //!< External 32KHz bypass oscillator.
#define OSC_MAINCK_4M_RC 3 //!< Internal 4MHz RC oscillator. #define OSC_MAINCK_4M_RC 3 //!< Internal 4MHz RC oscillator.
#define OSC_MAINCK_8M_RC 4 //!< Internal 8MHz RC oscillator. #define OSC_MAINCK_8M_RC 4 //!< Internal 8MHz RC oscillator.
#define OSC_MAINCK_12M_RC 5 //!< Internal 12MHz RC oscillator. #define OSC_MAINCK_12M_RC 5 //!< Internal 12MHz RC oscillator.
@ -105,9 +105,9 @@ extern "C" {
//! \name Oscillator clock speed in hertz //! \name Oscillator clock speed in hertz
//@{ //@{
#define OSC_SLCK_32K_RC_HZ CHIP_FREQ_SLCK_RC //!< Internal 32kHz RC oscillator. #define OSC_SLCK_32K_RC_HZ CHIP_FREQ_SLCK_RC //!< Internal 32KHz RC oscillator.
#define OSC_SLCK_32K_XTAL_HZ BOARD_FREQ_SLCK_XTAL //!< External 32kHz crystal oscillator. #define OSC_SLCK_32K_XTAL_HZ BOARD_FREQ_SLCK_XTAL //!< External 32KHz crystal oscillator.
#define OSC_SLCK_32K_BYPASS_HZ BOARD_FREQ_SLCK_BYPASS //!< External 32kHz bypass oscillator. #define OSC_SLCK_32K_BYPASS_HZ BOARD_FREQ_SLCK_BYPASS //!< External 32KHz bypass oscillator.
#define OSC_MAINCK_4M_RC_HZ CHIP_FREQ_MAINCK_RC_4MHZ //!< Internal 4MHz RC oscillator. #define OSC_MAINCK_4M_RC_HZ CHIP_FREQ_MAINCK_RC_4MHZ //!< Internal 4MHz RC oscillator.
#define OSC_MAINCK_8M_RC_HZ CHIP_FREQ_MAINCK_RC_8MHZ //!< Internal 8MHz RC oscillator. #define OSC_MAINCK_8M_RC_HZ CHIP_FREQ_MAINCK_RC_8MHZ //!< Internal 8MHz RC oscillator.
#define OSC_MAINCK_12M_RC_HZ CHIP_FREQ_MAINCK_RC_12MHZ //!< Internal 12MHz RC oscillator. #define OSC_MAINCK_12M_RC_HZ CHIP_FREQ_MAINCK_RC_12MHZ //!< Internal 12MHz RC oscillator.

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@ -156,9 +156,9 @@ extern "C" {
//! \name Master Clock Sources (MCK) //! \name Master Clock Sources (MCK)
//@{ //@{
#define SYSCLK_SRC_SLCK_RC 0 //!< Internal 32kHz RC oscillator as master source clock #define SYSCLK_SRC_SLCK_RC 0 //!< Internal 32KHz RC oscillator as master source clock
#define SYSCLK_SRC_SLCK_XTAL 1 //!< External 32kHz crystal oscillator as master source clock #define SYSCLK_SRC_SLCK_XTAL 1 //!< External 32KHz crystal oscillator as master source clock
#define SYSCLK_SRC_SLCK_BYPASS 2 //!< External 32kHz bypass oscillator as master source clock #define SYSCLK_SRC_SLCK_BYPASS 2 //!< External 32KHz bypass oscillator as master source clock
#define SYSCLK_SRC_MAINCK_4M_RC 3 //!< Internal 4MHz RC oscillator as master source clock #define SYSCLK_SRC_MAINCK_4M_RC 3 //!< Internal 4MHz RC oscillator as master source clock
#define SYSCLK_SRC_MAINCK_8M_RC 4 //!< Internal 8MHz RC oscillator as master source clock #define SYSCLK_SRC_MAINCK_8M_RC 4 //!< Internal 8MHz RC oscillator as master source clock
#define SYSCLK_SRC_MAINCK_12M_RC 5 //!< Internal 12MHz RC oscillator as master source clock #define SYSCLK_SRC_MAINCK_12M_RC 5 //!< Internal 12MHz RC oscillator as master source clock

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@ -39,7 +39,7 @@ void watchdogSetup() {
uint32_t timeout = TERN(WATCHDOG_DURATION_8S, 8000, 4000); uint32_t timeout = TERN(WATCHDOG_DURATION_8S, 8000, 4000);
// Calculate timeout value in WDT counter ticks: This assumes // Calculate timeout value in WDT counter ticks: This assumes
// the slow clock is running at 32.768 kHz watchdog // the slow clock is running at 32.768 KHz watchdog
// frequency is therefore 32768 / 128 = 256 Hz // frequency is therefore 32768 / 128 = 256 Hz
timeout = (timeout << 8) / 1000; timeout = (timeout << 8) / 1000;
if (timeout == 0) if (timeout == 0)

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@ -176,7 +176,7 @@ int i2s_init() {
* *
* fwclk = fbclk / 32 * fwclk = fbclk / 32
* *
* for fwclk = 250kHz (4µS pulse time) * for fwclk = 250KHz (4µS pulse time)
* N = 10 * N = 10
* M = 20 * M = 20
*/ */

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@ -26,7 +26,7 @@
* These are based on the LPC1768 pinMode, digitalRead & digitalWrite routines. * These are based on the LPC1768 pinMode, digitalRead & digitalWrite routines.
* *
* Couldn't just call exact copies because the overhead killed the LCD update speed * Couldn't just call exact copies because the overhead killed the LCD update speed
* With an intermediate level the softspi was running in the 10-20kHz range which * With an intermediate level the softspi was running in the 10-20KHz range which
* resulted in using about about 25% of the CPU's time. * resulted in using about about 25% of the CPU's time.
*/ */

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@ -27,7 +27,7 @@
* These are based on the LPC1768 pinMode, digitalRead & digitalWrite routines. * These are based on the LPC1768 pinMode, digitalRead & digitalWrite routines.
* *
* Couldn't just call exact copies because the overhead killed the LCD update speed * Couldn't just call exact copies because the overhead killed the LCD update speed
* With an intermediate level the softspi was running in the 10-20kHz range which * With an intermediate level the softspi was running in the 10-20KHz range which
* resulted in using about about 25% of the CPU's time. * resulted in using about about 25% of the CPU's time.
*/ */

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@ -26,7 +26,7 @@
* These are based on the LPC1768 pinMode, digitalRead & digitalWrite routines. * These are based on the LPC1768 pinMode, digitalRead & digitalWrite routines.
* *
* Couldn't just call exact copies because the overhead killed the LCD update speed * Couldn't just call exact copies because the overhead killed the LCD update speed
* With an intermediate level the softspi was running in the 10-20kHz range which * With an intermediate level the softspi was running in the 10-20KHz range which
* resulted in using about about 25% of the CPU's time. * resulted in using about about 25% of the CPU's time.
*/ */

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@ -27,7 +27,7 @@
* These are based on the LPC1768 pinMode, digitalRead & digitalWrite routines. * These are based on the LPC1768 pinMode, digitalRead & digitalWrite routines.
* *
* Couldn't just call exact copies because the overhead killed the LCD update speed * Couldn't just call exact copies because the overhead killed the LCD update speed
* With an intermediate level the softspi was running in the 10-20kHz range which * With an intermediate level the softspi was running in the 10-20KHz range which
* resulted in using about about 25% of the CPU's time. * resulted in using about about 25% of the CPU's time.
*/ */

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@ -48,7 +48,7 @@
#define TIMER_INDEX_(T) TIMER##T##_INDEX // TIMER#_INDEX enums (timer_index_t) depend on TIM#_BASE defines. #define TIMER_INDEX_(T) TIMER##T##_INDEX // TIMER#_INDEX enums (timer_index_t) depend on TIM#_BASE defines.
#define TIMER_INDEX(T) TIMER_INDEX_(T) // Convert Timer ID to HardwareTimer_Handle index. #define TIMER_INDEX(T) TIMER_INDEX_(T) // Convert Timer ID to HardwareTimer_Handle index.
#define TEMP_TIMER_FREQUENCY 1000 // Temperature::isr() is expected to be called at around 1kHz #define TEMP_TIMER_FREQUENCY 1000 // Temperature::isr() is expected to be called at around 1KHz
// TODO: get rid of manual rate/prescale/ticks/cycles taken for procedures in stepper.cpp // TODO: get rid of manual rate/prescale/ticks/cycles taken for procedures in stepper.cpp
#define STEPPER_TIMER_RATE 2000000 // 2 Mhz #define STEPPER_TIMER_RATE 2000000 // 2 Mhz

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@ -40,7 +40,7 @@
* Timer_clock1: Prescaler 2 -> 36 MHz * Timer_clock1: Prescaler 2 -> 36 MHz
* Timer_clock2: Prescaler 8 -> 9 MHz * Timer_clock2: Prescaler 8 -> 9 MHz
* Timer_clock3: Prescaler 32 -> 2.25 MHz * Timer_clock3: Prescaler 32 -> 2.25 MHz
* Timer_clock4: Prescaler 128 -> 562.5 kHz * Timer_clock4: Prescaler 128 -> 562.5 KHz
*/ */
/** /**

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@ -41,7 +41,7 @@ typedef uint32_t hal_timer_t;
#define FTM0_TIMER_PRESCALE_BITS 0b011 #define FTM0_TIMER_PRESCALE_BITS 0b011
#define FTM1_TIMER_PRESCALE_BITS 0b010 #define FTM1_TIMER_PRESCALE_BITS 0b010
#define FTM0_TIMER_RATE (F_BUS / (FTM0_TIMER_PRESCALE)) // 60MHz / 8 = 7500kHz #define FTM0_TIMER_RATE (F_BUS / (FTM0_TIMER_PRESCALE)) // 60MHz / 8 = 7500KHz
#define FTM1_TIMER_RATE (F_BUS / (FTM1_TIMER_PRESCALE)) // 60MHz / 4 = 15MHz #define FTM1_TIMER_RATE (F_BUS / (FTM1_TIMER_PRESCALE)) // 60MHz / 4 = 15MHz
#define HAL_TIMER_RATE (FTM0_TIMER_RATE) #define HAL_TIMER_RATE (FTM0_TIMER_RATE)

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@ -40,7 +40,7 @@ typedef uint32_t hal_timer_t;
#define FTM0_TIMER_PRESCALE_BITS 0b011 #define FTM0_TIMER_PRESCALE_BITS 0b011
#define FTM1_TIMER_PRESCALE_BITS 0b010 #define FTM1_TIMER_PRESCALE_BITS 0b010
#define FTM0_TIMER_RATE (F_BUS / FTM0_TIMER_PRESCALE) // 60MHz / 8 = 7500kHz #define FTM0_TIMER_RATE (F_BUS / FTM0_TIMER_PRESCALE) // 60MHz / 8 = 7500KHz
#define FTM1_TIMER_RATE (F_BUS / FTM1_TIMER_PRESCALE) // 60MHz / 4 = 15MHz #define FTM1_TIMER_RATE (F_BUS / FTM1_TIMER_PRESCALE) // 60MHz / 4 = 15MHz
#define HAL_TIMER_RATE (FTM0_TIMER_RATE) #define HAL_TIMER_RATE (FTM0_TIMER_RATE)

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@ -38,9 +38,9 @@
* 1 : 4 - 5 MHz * 1 : 4 - 5 MHz
* 2 : 2 - 2.5 MHz * 2 : 2 - 2.5 MHz
* 3 : 1 - 1.25 MHz * 3 : 1 - 1.25 MHz
* 4 : 500 - 625 kHz * 4 : 500 - 625 KHz
* 5 : 250 - 312 kHz * 5 : 250 - 312 KHz
* 6 : 125 - 156 kHz * 6 : 125 - 156 KHz
* *
* On AVR, actual speed is F_CPU/2^(1 + index). * On AVR, actual speed is F_CPU/2^(1 + index).
* On other platforms, speed should be in range given above where possible. * On other platforms, speed should be in range given above where possible.

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@ -82,7 +82,7 @@ void DigipotI2C::set_current(const uint8_t channel, const float current) {
void DigipotI2C::init() { void DigipotI2C::init() {
#if MB(MKS_SBASE) #if MB(MKS_SBASE)
configure_i2c(16); // Set clock_option to 16 ensure I2C is initialized at 400kHz configure_i2c(16); // Set clock_option to 16 ensure I2C is initialized at 400KHz
#else #else
Wire.begin(); Wire.begin();
#endif #endif

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@ -2495,7 +2495,7 @@ bool Planner::_populate_block(block_t * const block, bool split_move,
if (extruder_advance_K[active_extruder] * block->e_D_ratio * block->acceleration * 2 < SQRT(block->nominal_speed_sqr) * block->e_D_ratio) if (extruder_advance_K[active_extruder] * block->e_D_ratio * block->acceleration * 2 < SQRT(block->nominal_speed_sqr) * block->e_D_ratio)
SERIAL_ECHOLNPGM("More than 2 steps per eISR loop executed."); SERIAL_ECHOLNPGM("More than 2 steps per eISR loop executed.");
if (block->advance_speed < 200) if (block->advance_speed < 200)
SERIAL_ECHOLNPGM("eISR running at > 10kHz."); SERIAL_ECHOLNPGM("eISR running at > 10KHz.");
#endif #endif
} }
#endif #endif

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@ -883,7 +883,7 @@ class Planner {
static void finish_and_disable(); static void finish_and_disable();
// Periodic handler to manage the cleaning buffer counter // Periodic handler to manage the cleaning buffer counter
// Called from the Temperature ISR at ~1kHz // Called from the Temperature ISR at ~1KHz
static void isr() { if (cleaning_buffer_counter) --cleaning_buffer_counter; } static void isr() { if (cleaning_buffer_counter) --cleaning_buffer_counter; }
/** /**