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mirror of https://github.com/MarlinFirmware/Marlin.git synced 2024-11-26 05:17:17 +00:00

🔨 Simplify generic variants, update DFU tool (#27502)

This commit is contained in:
Scott Lahteine 2024-11-02 18:42:20 -05:00 committed by GitHub
parent 7b104a108f
commit 08717d3f60
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GPG Key ID: B5690EEEBB952194
26 changed files with 110 additions and 100 deletions

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@ -16,7 +16,7 @@
],
"ldscript": "ldscript.ld",
"mcu": "stm32f401ret6",
"variant": "MARLIN_CREALITY_STM32F401RE"
"variant": "MARLIN_F401RE_CREALITY"
},
"debug": {
"jlink_device": "STM32F401RE",

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@ -16,7 +16,7 @@
],
"ldscript": "ldscript.ld",
"mcu": "stm32f401ret6",
"variant": "MARLIN_STM32F401RE_FREERUNS"
"variant": "MARLIN_F401RE_FREERUNS"
},
"debug": {
"jlink_device": "STM32F401RE",

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@ -3,28 +3,41 @@
#
import pioutil
if pioutil.is_pio_build():
import shutil, marlin
from pathlib import Path
env = pioutil.env
platform = env.PioPlatform()
board = env.BoardConfig()
FRAMEWORK_DIR = Path(platform.get_package_dir("framework-arduinoststm32-maple"))
assert FRAMEWORK_DIR.is_dir()
source_root = Path("buildroot/share/PlatformIO/variants")
source_root_str = "buildroot/share/PlatformIO/variants"
source_root = Path(source_root_str)
assert source_root.is_dir()
env = pioutil.env
board = env.BoardConfig()
variant = board.get("build.variant")
variant_dir = FRAMEWORK_DIR / "STM32F1/variants" / variant
source_dir = source_root / variant
assert source_dir.is_dir()
if variant_dir.is_dir():
shutil.rmtree(variant_dir)
if True:
# Copying to the platform folder is still needed by STM32F1 (Maple).
# The alternative code below comes close. See if you can solve it!
platform = env.PioPlatform()
FRAMEWORK_DIR = Path(platform.get_package_dir("framework-arduinoststm32-maple"))
assert FRAMEWORK_DIR.is_dir()
if not variant_dir.is_dir():
variant_dir.mkdir()
variant_dir = FRAMEWORK_DIR / "STM32F1/variants" / variant
marlin.copytree(source_dir, variant_dir)
if variant_dir.is_dir():
import shutil
shutil.rmtree(variant_dir)
if not variant_dir.is_dir():
variant_dir.mkdir()
import marlin
marlin.copytree(source_dir, variant_dir)
else:
# The following almost works, but __start__ (from wirish/start.S) is not seen by common.inc
board.update("build.variants_dir", source_root_str);
src = str(source_dir)
env.Append(BUILD_FLAGS=[f"-I{src}", f"-L{src}/ld"]) # Add include path for variant

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@ -188,77 +188,75 @@ if pioutil.is_pio_build():
set_env_field('lib_ignore', lib_ignore)
build_src_filter = ""
if True:
# Build the actual equivalent build_src_filter list based on the inclusions by the features.
# PlatformIO doesn't do it this way, but maybe in the future....
cur_srcs = set()
# Remove the references to the same folder
my_srcs = re.findall(r'([+-]<.*?>)', build_filters)
for d in my_srcs:
# Assume normalized relative paths
plain = d[2:-1]
if d[0] == '+':
def addentry(fullpath, info=None):
relp = os.path.relpath(fullpath, marlinbasedir)
if srcfilepattern.match(relp):
if info:
blab("Added src file %s (%s)" % (relp, str(info)), 3)
else:
blab("Added src file %s " % relp, 3)
cur_srcs.add(relp)
# Special rule: If a direct folder is specified add all files within.
fullplain = os.path.join(marlinbasedir, plain)
if os.path.isdir(fullplain):
blab("Directory content addition for %s " % plain, 3)
gpattern = os.path.join(fullplain, "**")
for fname in glob.glob(gpattern, recursive=True):
addentry(fname, "dca")
else:
# Add all the things from the pattern by GLOB.
def srepl(matchi):
g0 = matchi.group(0)
return r"**" + g0[1:]
gpattern = re.sub(r'[*]($|[^*])', srepl, plain)
gpattern = os.path.join(marlinbasedir, gpattern)
for fname in glob.glob(gpattern, recursive=True):
addentry(fname)
else:
# Special rule: If a direct folder is specified then remove all files within.
def onremove(relp, info=None):
# Build the actual equivalent build_src_filter list based on the inclusions by the features.
# PlatformIO doesn't do it this way, but maybe in the future....
cur_srcs = set()
# Remove the references to the same folder
my_srcs = re.findall(r'([+-]<.*?>)', build_filters)
for d in my_srcs:
# Assume normalized relative paths
plain = d[2:-1]
if d[0] == '+':
def addentry(fullpath, info=None):
relp = os.path.relpath(fullpath, marlinbasedir)
if srcfilepattern.match(relp):
if info:
blab("Removed src file %s (%s)" % (relp, str(info)), 3)
blab("Added src file %s (%s)" % (relp, str(info)), 3)
else:
blab("Removed src file %s " % relp, 3)
fullplain = os.path.join(marlinbasedir, plain)
if os.path.isdir(fullplain):
blab("Directory content removal for %s " % plain, 2)
def filt(x):
common = os.path.commonpath([plain, x])
if not common == os.path.normpath(plain): return True
onremove(x, "dcr")
return False
cur_srcs = set(filter(filt, cur_srcs))
else:
# Remove matching source entries.
def filt(x):
if not fnmatch.fnmatch(x, plain): return True
onremove(x)
return False
cur_srcs = set(filter(filt, cur_srcs))
# Transform the resulting set into a string.
for x in cur_srcs:
if build_src_filter != "": build_src_filter += ' '
build_src_filter += "+<" + x + ">"
blab("Added src file %s " % relp, 3)
cur_srcs.add(relp)
# Special rule: If a direct folder is specified add all files within.
fullplain = os.path.join(marlinbasedir, plain)
if os.path.isdir(fullplain):
blab("Directory content addition for %s " % plain, 3)
gpattern = os.path.join(fullplain, "**")
for fname in glob.glob(gpattern, recursive=True):
addentry(fname, "dca")
else:
# Add all the things from the pattern by GLOB.
def srepl(matchi):
g0 = matchi.group(0)
return r"**" + g0[1:]
gpattern = re.sub(r'[*]($|[^*])', srepl, plain)
gpattern = os.path.join(marlinbasedir, gpattern)
#blab("Final build_src_filter: " + build_src_filter, 3)
else:
build_src_filter = build_filters
for fname in glob.glob(gpattern, recursive=True):
addentry(fname)
else:
# Special rule: If a direct folder is specified then remove all files within.
def onremove(relp, info=None):
if info:
blab("Removed src file %s (%s)" % (relp, str(info)), 3)
else:
blab("Removed src file %s " % relp, 3)
fullplain = os.path.join(marlinbasedir, plain)
if os.path.isdir(fullplain):
blab("Directory content removal for %s " % plain, 2)
def filt(x):
common = os.path.commonpath([plain, x])
if not common == os.path.normpath(plain): return True
onremove(x, "dcr")
return False
cur_srcs = set(filter(filt, cur_srcs))
else:
# Remove matching source entries.
def filt(x):
if not fnmatch.fnmatch(x, plain): return True
onremove(x)
return False
cur_srcs = set(filter(filt, cur_srcs))
# Transform the resulting set into a string.
for x in cur_srcs:
if build_src_filter != "": build_src_filter += ' '
build_src_filter += "+<" + x + ">"
# Update in PlatformIO
set_env_field('build_src_filter', [build_src_filter])
env.Replace(SRC_FILTER=build_src_filter)
#blab("Final build_src_filter: " + build_src_filter, 3)
#
# Use the compiler to get a list of all enabled features
#

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@ -40,26 +40,17 @@ if pioutil.is_pio_build():
FRAMEWORK_DIR = Path(platform.get_package_dir(platform_name))
assert FRAMEWORK_DIR.is_dir()
#
# Point variants_dir to our variant folder when board_build.variant
# is provided and the variant name begins with "marlin_".
#
board = env.BoardConfig()
#mcu_type = board.get("build.mcu")[:-2]
variant = board.get("build.variant")
#mcu_type = board.get("build.mcu")[:-2]
#series = mcu_type[:7].upper() + "xx"
# Only prepare a new variant if the PlatformIO configuration provides it (board_build.variant).
# This check is important to avoid deleting official board config variants.
# Make sure the local variant sub-folder exists
if marlin_variant_pattern.match(str(variant).lower()):
# Prepare a new empty folder at the destination
variant_dir = FRAMEWORK_DIR / "variants" / variant
if variant_dir.is_dir():
shutil.rmtree(variant_dir)
if not variant_dir.is_dir():
variant_dir.mkdir()
# Source dir is a local variant sub-folder
source_dir = Path("buildroot/share/PlatformIO/variants", variant)
assert source_dir.is_dir()
print("Copying variant " + str(variant) + " to framework directory...")
marlin.copytree(source_dir, variant_dir)
board.update("build.variants_dir", "buildroot/share/PlatformIO/variants");

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@ -64,6 +64,7 @@ monitor_speed = 115200
[env:STM32F103RC_meeb_maple]
extends = env:STM32F103RC_maple
board = marlin_maple_MEEB_3DP
platform_packages = platformio/tool-dfuutil@~1.11.0
build_flags = ${env:STM32F103RC_maple.build_flags}
-DDEBUG_LEVEL=0
-DSS_TIMER=4

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@ -200,7 +200,7 @@ board = genericSTM32F103RC
extends = STM32F103Rx_creality
board = genericSTM32F103VE
board_build.variant = MARLIN_F103Vx
build_flags = ${stm32_variant.build_flags}
build_flags = ${STM32F103Rx_creality.build_flags}
-DSS_TIMER=4 -DTIMER_SERVO=TIM5
-DENABLE_HWSERIAL3 -DTRANSFER_CLOCK_DIV=8
#
@ -253,7 +253,7 @@ board = malyanm200_f103cb
build_flags = ${common_stm32.build_flags}
-DHAL_PCD_MODULE_ENABLED -DDISABLE_GENERIC_SERIALUSB
-DHAL_UART_MODULE_ENABLED
build_src_filter = ${common.default_src_filter} +<src/HAL/STM32> -<src/HAL/STM32/tft>
build_src_filter = ${common_stm32.build_src_filter} +<src/HAL/STM32> -<src/HAL/STM32/tft>
#
# FLYmaker FLY Mini (STM32F103RCT6)
@ -462,7 +462,7 @@ board_upload.offset_address = 0x08005000
board_build.offset = 0x5000
board_upload.maximum_size = 237568
extra_scripts = ${stm32_variant.extra_scripts}
build_flags = ${common_stm32.build_flags}
build_flags = ${stm32_variant.build_flags}
-DSS_TIMER=4 -DTIMER_SERVO=TIM5 -DUSE_USB_FS -DUSBD_IRQ_PRIO=5 -DUSBD_IRQ_SUBPRIO=6 -DUSBD_USE_CDC_MSC
build_unflags = ${stm32_variant.build_unflags} -DUSBD_USE_CDC

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@ -33,6 +33,7 @@ build_flags = ${common_stm32.build_flags}
#
[env:FYSETC_CHEETAH_V20]
extends = stm32_variant
platform_packages = platformio/tool-dfuutil@~1.11.0
board = marlin_FYSETC_CHEETAH_V20
board_build.offset = 0x8000
build_flags = ${stm32_variant.build_flags} -DSTM32F401xC
@ -43,6 +44,7 @@ upload_command = dfu-util -a 0 -s 0x08008000:leave -D "$SOURCE"
#
[env:FYSETC_CHEETAH_V30]
extends = stm32_variant
platform_packages = platformio/tool-dfuutil@~1.11.0
board = marlin_FYSETC_CHEETAH_V30
build_flags = ${stm32_variant.build_flags} -DHAL_PCD_MODULE_ENABLED
debug_tool = stlink
@ -54,6 +56,7 @@ upload_command = dfu-util -a 0 -s 0x08000000:leave -D "$SOURCE"
#
[env:FLYF407ZG]
extends = stm32_variant
platform_packages = platformio/tool-dfuutil@~1.11.0
board = marlin_STM32F407ZGT6
board_build.variant = MARLIN_FLY_F407ZG
board_build.offset = 0x8000
@ -64,6 +67,7 @@ upload_protocol = dfu
#
[env:FYSETC_S6]
extends = stm32_variant
platform_packages = platformio/tool-dfuutil@~1.11.0
board = marlin_fysetc_s6
board_build.offset = 0x10000
board_upload.offset_address = 0x08010000
@ -87,6 +91,7 @@ upload_command = dfu-util -a 0 -s 0x08008000:leave -D "$SOURCE"
#
[env:FYSETC_SPIDER_KING407]
extends = stm32_variant
platform_packages = platformio/tool-dfuutil@~1.11.0
board = marlin_STM32F407ZGT6
board_build.variant = MARLIN_FYSETC_SPIDER_KING407
board_build.offset = 0x8000
@ -418,6 +423,7 @@ build_flags = ${stm_flash_drive.build_flags} ${lerdge_common.build_flags}
#
[env:rumba32]
extends = stm32_variant
platform_packages = platformio/tool-dfuutil@~1.11.0
board = rumba32_f446ve
board_build.variant = MARLIN_F446VE
board_build.offset = 0x0000
@ -685,7 +691,7 @@ extra_scripts = ${common_stm32.extra_scripts}
[STM32F401RC_creality_base]
extends = stm32_variant
board = genericSTM32F401RC
board_build.variant = MARLIN_CREALITY_STM32F401RC
board_build.variant = MARLIN_F401RC_CREALITY
build_flags = ${stm32_variant.build_flags} -DMCU_STM32F401RC -DSTM32F4
-DSS_TIMER=4 -DTIMER_SERVO=TIM5
-DENABLE_HWSERIAL3 -DTRANSFER_CLOCK_DIV=8
@ -720,7 +726,7 @@ upload_protocol = stlink
#
[env:STM32F401RE_creality]
extends = stm32_variant
board = marlin_CREALITY_STM32F401RE
board = marlin_STM32F401RE_creality
board_build.offset = 0x10000
board_upload.offset_address = 0x08010000
board_build.rename = firmware-{date}-{time}.bin
@ -806,6 +812,7 @@ board_build.rename = mks_skipr.bin
[env:mks_skipr_v1_nobootloader]
extends = env:mks_skipr_v1
platform_packages = platformio/tool-dfuutil@~1.11.0
board_build.rename = firmware.bin
board_build.offset = 0x0000
board_upload.offset_address = 0x08000000
@ -862,6 +869,7 @@ upload_protocol = stlink
#
[env:BLACKBEEZMINI_V1]
platform = ststm32
platform_packages = platformio/tool-dfuutil@~1.11.0
extends = common_stm32
board = blackpill_f401cc
board_build.offset = 0x0000
@ -894,7 +902,6 @@ upload_protocol = stlink
# XTLW3D Climber-8th-F4 (STM32F407VGT6 ARM Cortex-M4)
#
[env:XTLW_CLIMBER_8TH]
platform = ${common_stm32.platform}
extends = stm32_variant
platform_packages = ${stm_flash_drive.platform_packages}
board = marlin_STM32F407VGT6_CCM