From 2b2a8355c9ac2c9361c8e21b533ad772a0756d28 Mon Sep 17 00:00:00 2001
From: Tanguy Pruvot <tpruvot@users.noreply.github.com>
Date: Wed, 4 Aug 2021 08:14:54 +0200
Subject: [PATCH] =?UTF-8?q?=F0=9F=90=9B=20Fix=20Longer3D=20STM32=20boot,?=
=?UTF-8?q?=20add=20Maple=20test=20(#22473)?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
---
.github/workflows/test-builds.yml | 3 +-
Marlin/src/pins/stm32f1/pins_LONGER3D_LK.h | 9 +-
.../MARLIN_F103VE_LONGER/PeripheralPins.c | 289 +++++++++++++++
.../MARLIN_F103VE_LONGER/PinNamesVar.h | 32 ++
.../MARLIN_F103VE_LONGER/hal_conf_custom.h | 348 ++++++++++++++++++
.../variants/MARLIN_F103VE_LONGER/ldscript.ld | 189 ++++++++++
.../variants/MARLIN_F103VE_LONGER/variant.cpp | 249 +++++++++++++
.../variants/MARLIN_F103VE_LONGER/variant.h | 175 +++++++++
ini/stm32f1.ini | 14 +-
9 files changed, 1299 insertions(+), 9 deletions(-)
create mode 100644 buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/PeripheralPins.c
create mode 100644 buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/PinNamesVar.h
create mode 100644 buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/hal_conf_custom.h
create mode 100644 buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/ldscript.ld
create mode 100644 buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.cpp
create mode 100644 buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.h
diff --git a/.github/workflows/test-builds.yml b/.github/workflows/test-builds.yml
index 5429f3eb95c..e45bf42f29a 100644
--- a/.github/workflows/test-builds.yml
+++ b/.github/workflows/test-builds.yml
@@ -61,7 +61,7 @@ jobs:
- STM32F103RC_fysetc
- STM32F103RC_meeb
- jgaurora_a5s_a1
- - STM32F103VE_longer
+ - STM32F103VE_longer_maple
#- mks_robin_maple
- mks_robin_lite
- mks_robin_pro
@@ -75,6 +75,7 @@ jobs:
- STM32F103RE_btt
- STM32F103RE_btt_USB
- STM32F103RET6_creality
+ - STM32F103VE_longer
- STM32F407VE_black
- STM32F401VE_STEVAL
- BIGTREE_BTT002
diff --git a/Marlin/src/pins/stm32f1/pins_LONGER3D_LK.h b/Marlin/src/pins/stm32f1/pins_LONGER3D_LK.h
index f9ec42b68ef..bdf215fa8e4 100644
--- a/Marlin/src/pins/stm32f1/pins_LONGER3D_LK.h
+++ b/Marlin/src/pins/stm32f1/pins_LONGER3D_LK.h
@@ -99,12 +99,19 @@
// Avoid nozzle heat and fan start before serial init
#define BOARD_OPENDRAIN_MOSFETS
-#define BOARD_PREINIT() { \
+#define BOARD_INIT_OD_PINS() { \
OUT_WRITE_OD(HEATER_0_PIN, 0); \
OUT_WRITE_OD(HEATER_BED_PIN, 0); \
OUT_WRITE_OD(FAN_PIN, 0); \
}
+#ifdef MAPLE_STM32F1
+ // Only Maple Framework allow that early
+ #define BOARD_PREINIT BOARD_INIT_OD_PINS
+#else
+ #define BOARD_INIT BOARD_INIT_OD_PINS
+#endif
+
//
// PWM for a servo probe
// Other servo devices are not supported on this board!
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/PeripheralPins.c b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/PeripheralPins.c
new file mode 100644
index 00000000000..ba4046d5f98
--- /dev/null
+++ b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/PeripheralPins.c
@@ -0,0 +1,289 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2020, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ * Automatically generated from STM32F103V(F-G)Tx.xml
+ */
+#include "Arduino.h"
+#include "PeripheralPins.h"
+
+/* =====
+ * Note: Commented lines are alternative possibilities which are not used per default.
+ * If you change them, you will have to know what you do
+ * =====
+ */
+
+//*** ADC ***
+
+#ifdef HAL_ADC_MODULE_ENABLED
+WEAK const PinMap PinMap_ADC[] = {
+ {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
+//{PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
+//{PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0
+ {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
+//{PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
+//{PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
+ {NC, NP, 0}
+};
+#endif
+
+//*** DAC ***
+
+#if defined(STM32F103xE) || defined(STM32F103xG)
+#ifdef HAL_DAC_MODULE_ENABLED
+WEAK const PinMap PinMap_DAC[] = {
+//{PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
+//{PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
+ {NC, NP, 0}
+};
+#endif
+#endif
+
+//*** I2C ***
+
+#ifdef HAL_I2C_MODULE_ENABLED
+WEAK const PinMap PinMap_I2C_SDA[] = {
+ {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
+ {NC, NP, 0}
+};
+
+WEAK const PinMap PinMap_I2C_SCL[] = {
+ {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)},
+ {NC, NP, 0}
+};
+#endif
+
+//*** PWM ***
+
+#ifdef HAL_TIM_MODULE_ENABLED
+WEAK const PinMap PinMap_PWM[] = {
+#if 0
+ {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1
+ //{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1
+#if defined(STM32F103xE) || defined(STM32F103xG)
+ //{PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM5_CH1
+#endif
+ {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM2_CH2
+ //{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2
+#if defined(STM32F103xE) || defined(STM32F103xG)
+ //{PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM5_CH2
+#endif
+ {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM2_CH3
+ //{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3
+#if defined(STM32F103xE) || defined(STM32F103xG)
+ //{PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM5_CH3
+#endif
+#ifdef STM32F103xG
+ //{PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM9_CH1
+#endif
+ //{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4
+#if defined(STM32F103xE) || defined(STM32F103xG)
+ //{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4
+ {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM5_CH4
+#else
+ {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4
+#endif
+#if defined(STM32F103xG)
+ //{PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2
+#endif
+ {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1
+#if defined(STM32F103xG)
+ //{PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1
+#endif
+ {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
+ //{PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2
+ //{PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM8_CH1N
+#if defined(STM32F103xG)
+ //{PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1
+#endif
+ {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1
+ //{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1
+ {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM1_CH2
+ //{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2
+ {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM1_CH3
+ //{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3
+ {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM1_CH4
+ //{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4
+ {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1
+ //{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1
+ //{PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N
+ {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM3_CH3
+ //{PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3
+#if defined(STM32F103xE) || defined(STM32F103xG)
+ //{PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM8_CH2N
+#endif
+ {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N
+ //{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM3_CH4
+ //{PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4
+#if defined(STM32F103xE) || defined(STM32F103xG)
+ //{PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM8_CH3N
+#endif
+ {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2
+ //{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2
+ {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1
+ {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2
+ {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1
+ {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2
+ {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3
+#if defined(STM32F103xG)
+ //{PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1
+#endif
+ {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4
+#if defined(STM32F103xG)
+ //{PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1
+#endif
+ {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3
+ //{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3
+ {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4
+ //{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4
+ {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N
+ {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N
+#if defined(STM32F103xG)
+ //{PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1
+#endif
+ {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N
+#if defined(STM32F103xG)
+ //{PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2
+#endif
+ {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1
+#if defined(STM32F103xE) || defined(STM32F103xG)
+ //{PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM8_CH1
+#endif
+ {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 2, 0)}, // TIM3_CH2
+#if defined(STM32F103xE) || defined(STM32F103xG)
+ //{PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM8_CH2
+#endif
+ {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 3, 0)}, // TIM3_CH3
+ //{PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM8_CH3
+ {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 4, 0)}, // TIM3_CH4
+#if defined(STM32F103xE) || defined(STM32F103xG)
+ //{PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM8_CH4
+#endif
+ {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 1, 0)}, // TIM4_CH1
+ {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 2, 0)}, // TIM4_CH2
+ {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 3, 0)}, // TIM4_CH3
+ {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 4, 0)}, // TIM4_CH4
+#if defined(STM32F103xG)
+ {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 1, 0)}, // TIM9_CH1
+ {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 2, 0)}, // TIM9_CH2
+#endif
+ {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 1)}, // TIM1_CH1N
+ {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 0)}, // TIM1_CH1
+ {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 1)}, // TIM1_CH2N
+ {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 0)}, // TIM1_CH2
+ {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 1)}, // TIM1_CH3N
+ {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 0)}, // TIM1_CH3
+ {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 4, 0)}, // TIM1_CH4
+#endif // if 0
+ {NC, NP, 0}
+};
+#endif
+
+//*** SERIAL ***
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_TX[] = {
+ {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
+ {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
+//{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
+ {NC, NP, 0}
+};
+
+WEAK const PinMap PinMap_UART_RX[] = {
+ {PA_3, USART2, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)},
+ {PA_10, USART1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)},
+//{PB_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)},
+ {NC, NP, 0}
+};
+
+WEAK const PinMap PinMap_UART_RTS[] = {
+ {NC, NP, 0}
+};
+
+WEAK const PinMap PinMap_UART_CTS[] = {
+ {NC, NP, 0}
+};
+#endif
+
+//*** SPI ***
+
+WEAK const PinMap PinMap_SPI_MOSI[] = {
+ {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
+//{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
+ {NC, NP, 0}
+};
+
+WEAK const PinMap PinMap_SPI_MISO[] = {
+ {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
+//{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
+ {NC, NP, 0}
+};
+
+WEAK const PinMap PinMap_SPI_SCLK[] = {
+ {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
+//{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
+ {NC, NP, 0}
+};
+
+WEAK const PinMap PinMap_SPI_SSEL[] = {
+//{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
+//{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
+ {NC, NP, 0}
+};
+
+//*** No CAN ***
+
+#ifdef HAL_CAN_MODULE_ENABLED
+WEAK const PinMap PinMap_CAN_RD[] = {
+ {NC, NP, 0}
+};
+
+WEAK const PinMap PinMap_CAN_TD[] = {
+ {NC, NP, 0}
+};
+#endif
+
+//*** No ETHERNET ***
+
+//*** No QUADSPI ***
+
+//*** USB ***
+
+#ifdef HAL_PCD_MODULE_ENABLED
+WEAK const PinMap PinMap_USB[] = {
+ {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM
+ {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP
+ {NC, NP, 0}
+};
+#endif
+
+//*** No USB_OTG_FS ***
+
+//*** No USB_OTG_HS ***
+
+//*** SD ***
+
+#if defined(STM32F103xE) || defined(STM32F103xG)
+#ifdef HAL_SD_MODULE_ENABLED
+WEAK const PinMap PinMap_SD[] = {
+//{PB_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D4
+//{PB_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D5
+//{PC_6, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D6
+//{PC_7, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D7
+ {PC_8, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D0
+ {PC_9, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D1
+ {PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D2
+ {PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D3
+ {PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CK
+ {PD_2, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CMD
+ {NC, NP, 0}
+};
+#endif
+#endif
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/PinNamesVar.h b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/PinNamesVar.h
new file mode 100644
index 00000000000..9c07918364a
--- /dev/null
+++ b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/PinNamesVar.h
@@ -0,0 +1,32 @@
+/* SYS_WKUP */
+#if defined(PWR_WAKEUP_PIN1) && defined(HAL_PWR_MODULE_ENABLED) && !defined(HAL_PWR_MODULE_ONLY)
+ #error PA0 is used by thermal sensor, disable low power wake with -DHAL_PWR_MODULE_ONLY
+ SYS_WKUP1 = PA_0,
+#endif
+#ifdef PWR_WAKEUP_PIN2
+ SYS_WKUP2 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN3
+ SYS_WKUP3 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN4
+ SYS_WKUP4 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN5
+ SYS_WKUP5 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN6
+ SYS_WKUP6 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN7
+ SYS_WKUP7 = NC,
+#endif
+#ifdef PWR_WAKEUP_PIN8
+ SYS_WKUP8 = NC,
+#endif
+/* USB */
+#ifdef USBCON
+ #warning USB feature is not required with a CH340 chip
+ USB_DM = PA_11,
+ USB_DP = PA_12,
+#endif
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/hal_conf_custom.h b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/hal_conf_custom.h
new file mode 100644
index 00000000000..e2247addb96
--- /dev/null
+++ b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/hal_conf_custom.h
@@ -0,0 +1,348 @@
+/**
+ ******************************************************************************
+ * @file hal_conf_custom.h for Longer3D STM32F103VE board
+ * @brief Overrides HAL default configuration file.
+ ******************************************************************************
+ */
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief Include the default list of modules to be used in the HAL driver
+ * and manage module deactivation
+ */
+#include "stm32yyxx_hal_conf.h"
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #undef HAL_PWR_MODULE_ENABLED // only way to disable it
+#endif
+
+#if defined(HAL_PWR_MODULE_ENABLED) && !defined(HAL_PWR_MODULE_ONLY)
+ #define HAL_PWR_MODULE_ONLY // disable low power & PA0 wakeup pin (its T°c pin)
+#endif
+
+#ifndef HAL_IWDG_MODULE_ENABLED
+ #define HAL_IWDG_MODULE_ENABLED // USE_WATCHDOG
+#endif
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #warning No direct STM32 USB pins on Longer3D board
+ #undef HAL_PCD_MODULE_ENABLED // USB Device
+#endif
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #warning No direct STM32 USB pins on Longer3D board
+ #undef HAL_HCD_MODULE_ENABLED // USB Host
+#endif
+
+#ifndef HAL_USART_MODULE_ENABLED
+ //#define HAL_USART_MODULE_ENABLED // Useless.... UART_MODULE do it
+#endif
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+ #undef HAL_CAN_LEGACY_MODULE_ENABLED
+#endif
+
+#ifdef HAL_CAN_MODULE_ENABLED
+ #undef HAL_CAN_MODULE_ENABLED
+#endif
+
+#ifdef HAL_DAC_MODULE_ENABLED
+ #undef HAL_DAC_MODULE_ENABLED
+#endif
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #undef HAL_RTC_MODULE_ENABLED
+#endif
+
+#ifndef HAL_EXTI_MODULE_ENABLED
+ #define HAL_EXTI_MODULE_ENABLED // for ENDSTOP_INTERRUPTS_FEATURE
+#endif
+
+/**
+ * @brief List of modules in the framework (first ones enabled by default)
+ */
+//#define HAL_MODULE_ENABLED
+//#define HAL_ADC_MODULE_ENABLED
+//#define HAL_CORTEX_MODULE_ENABLED
+//#define HAL_DAC_MODULE_ENABLED
+//#define HAL_DMA_MODULE_ENABLED
+//#define HAL_FLASH_MODULE_ENABLED
+//#define HAL_GPIO_MODULE_ENABLED
+//#define HAL_I2C_MODULE_ENABLED
+//#define HAL_PCD_MODULE_ENABLED
+//#define HAL_PWR_MODULE_ENABLED
+//#define HAL_RCC_MODULE_ENABLED
+//#define HAL_RTC_MODULE_ENABLED
+//#define HAL_SD_MODULE_ENABLED
+//#define HAL_SPI_MODULE_ENABLED
+//#define HAL_SRAM_MODULE_ENABLED
+//#define HAL_TIM_MODULE_ENABLED
+//#define HAL_UART_MODULE_ENABLED
+
+//#define HAL_CAN_MODULE_ENABLED
+//#define HAL_CAN_LEGACY_MODULE_ENABLED
+//#define HAL_CEC_MODULE_ENABLED
+//#define HAL_CRC_MODULE_ENABLED
+//#define HAL_ETH_MODULE_ENABLED
+//#define HAL_EXTI_MODULE_ENABLED
+//#define HAL_HCD_MODULE_ENABLED
+//#define HAL_I2S_MODULE_ENABLED
+//#define HAL_IRDA_MODULE_ENABLED
+//#define HAL_IWDG_MODULE_ENABLED
+//#define HAL_NAND_MODULE_ENABLED
+//#define HAL_NOR_MODULE_ENABLED
+//#define HAL_PCCARD_MODULE_ENABLED
+//#define HAL_SMARTCARD_MODULE_ENABLED
+//#define HAL_USART_MODULE_ENABLED
+//#define HAL_WWDG_MODULE_ENABLED
+//#define HAL_MMC_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#ifndef HSE_VALUE
+ #define HSE_VALUE 8000000U // Value of the External oscillator in Hz (8 MHz)
+#endif
+
+#ifndef HSE_STARTUP_TIMEOUT
+ #define HSE_STARTUP_TIMEOUT 100U // Time out for HSE start up, in ms
+#endif
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#ifndef HSI_VALUE
+ #define HSI_VALUE 8000000U // Value of the Internal oscillator in Hz
+#endif
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#ifndef LSI_VALUE
+ #define LSI_VALUE 40000U // LSI Typical Value in Hz
+#endif /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature. */
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#ifndef LSE_VALUE
+ #define LSE_VALUE 32768U // Value of the External Low Speed oscillator in Hz
+#endif
+
+#ifndef LSE_STARTUP_TIMEOUT
+ #define LSE_STARTUP_TIMEOUT 50U // No 32.7KHz LSE on this board, reduced to avoid delays
+#endif
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+#ifndef VDD_VALUE
+ #define VDD_VALUE 3300U // Value of VDD in mv
+#endif
+#ifndef TICK_INT_PRIORITY
+ #define TICK_INT_PRIORITY 0x00U // tick interrupt priority
+#endif
+#ifndef USE_RTOS
+ #define USE_RTOS 0U
+#endif
+#ifndef PREFETCH_ENABLE
+ #define PREFETCH_ENABLE 1U
+#endif
+
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
+#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
+#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
+#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
+#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
+#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
+#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
+#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
+#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
+#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
+#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
+#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+#if !defined(USE_SPI_CRC)
+#define USE_SPI_CRC 0
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+ #include "stm32f1xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+ #include "stm32f1xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+ #include "stm32f1xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+ #include "stm32f1xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+ #include "stm32f1xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+ #include "stm32f1xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+ #include "Legacy/stm32f1xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+ #include "stm32f1xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+ #include "stm32f1xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+ #include "stm32f1xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+ #include "stm32f1xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+ #include "stm32f1xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+ #include "stm32f1xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+ #include "stm32f1xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+ #include "stm32f1xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f1xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f1xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f1xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f1xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f1xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_PCCARD_MODULE_ENABLED
+ #include "stm32f1xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f1xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+ #include "stm32f1xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f1xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f1xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f1xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f1xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f1xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f1xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f1xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f1xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f1xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32f1xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+
+#define assert_param(expr) ((void)0U)
+
+#ifdef __cplusplus
+}
+#endif
+
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/ldscript.ld b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/ldscript.ld
new file mode 100644
index 00000000000..6bc577236a9
--- /dev/null
+++ b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/ldscript.ld
@@ -0,0 +1,189 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32F103V(8/B/C/E/F/GTx Device from STM32F1 series
+** 64/128/256/512/768/1024Kbytes FLASH
+** 20/20/48/64/64/96/96Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of "RAM" Ram type memory */
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
+ FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata : {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab : {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM : {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array : {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array : {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array : {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data : {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss : {
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack : {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ : {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.cpp b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.cpp
new file mode 100644
index 00000000000..007ef81065b
--- /dev/null
+++ b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.cpp
@@ -0,0 +1,249 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2019, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+
+#include "pins_arduino.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// Digital PinName array
+const PinName digitalPin[] = {
+ PA_0, //D0
+ PA_1, //D1
+ PA_2, //D2
+ PA_3, //D3
+ PA_4, //D4
+ PA_5, //D5
+ PA_6, //D6
+ PA_7, //D7
+ PA_8, //D8
+ PA_9, //D9
+ PA_10, //D10
+ PA_11, //D11
+ PA_12, //D12
+ PA_13, //D13
+ PA_14, //D14
+ PA_15, //D15
+
+ PB_0, //D16
+ PB_1, //D17
+ PB_2, //D18
+ PB_3, //D19
+ PB_4, //D20
+ PB_5, //D21
+ PB_6, //D22
+ PB_7, //D23
+ PB_8, //D24
+ PB_9, //D25
+ PB_10, //D26
+ PB_11, //D27
+ PB_12, //D28
+ PB_13, //D29
+ PB_14, //D30
+ PB_15, //D31
+
+ PC_0, //D32
+ PC_1, //D33
+ PC_2, //D34
+ PC_3, //D35
+ PC_4, //D36
+ PC_5, //D37
+ PC_6, //D38
+ PC_7, //D39
+ PC_8, //D40
+ PC_9, //D41
+ PC_10, //D42
+ PC_11, //D43
+ PC_12, //D44
+ PC_13, //D45
+ PC_14, //D46
+ PC_15, //D47
+
+ PD_0, //D48
+ PD_1, //D49
+ PD_2, //D50
+ PD_3, //D51
+ PD_4, //D52
+ PD_5, //D53
+ PD_6, //D54
+ PD_7, //D55
+ PD_8, //D56
+ PD_9, //D57
+ PD_10, //D58
+ PD_11, //D59
+ PD_12, //D60
+ PD_13, //D61
+ PD_14, //D62
+ PD_15, //D63
+
+ PE_0, //D64
+ PE_1, //D65
+ PE_2, //D66
+ PE_3, //D67
+ PE_4, //D68
+ PE_5, //D69
+ PE_6, //D70
+ PE_7, //D71
+ PE_8, //D72
+ PE_9, //D73
+ PE_10, //D74
+ PE_11, //D75
+ PE_12, //D76
+ PE_13, //D77
+ PE_14, //D78
+ PE_15, //D79
+};
+
+// Analog (Ax) pin number array
+const uint32_t analogInputPin[] = {
+ 0, // A0, PA0
+ 1, // A1, PA1
+ 2, // A2, PA2
+ 3, // A3, PA3
+ 4, // A4, PA4
+ 5, // A5, PA5
+ 6, // A6, PA6
+ 7, // A7, PA7
+ 16, // A8, PB0
+ 17, // A9, PB1
+ 32, // A10, PC0
+ 33, // A11, PC1
+ 34, // A12, PC2
+ 35, // A13, PC3
+ 36, // A14, PC4
+ 37, // A15, PC5
+};
+
+/******************************************************************************/
+/* PLL (clocked by HSE) used as System clock source */
+/******************************************************************************/
+static bool SetSysClock_PLL_HSE(bool bypass)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
+ bool ret = false;
+
+ // Initializes the CPU, AHB and APB busses clocks
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ if (bypass == false) {
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ } else {
+ RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
+ }
+ RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; // 8Mhz x 9 = 72MHz
+
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
+ // Initializes the CPU, AHB and APB busses clocks
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK) {
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
+ PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
+ PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; // 72/1.5 = 48MHz
+ #ifndef USBCON
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
+ #endif
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) {
+ ret = true;
+ }
+ }
+ }
+ return ret;
+}
+
+/******************************************************************************/
+/* PLL (clocked by HSI) used as System clock source (64MHz max) */
+/******************************************************************************/
+bool SetSysClock_PLL_HSI(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
+ bool ret = false;
+
+ // Initializes the CPU, AHB and APB busses clocks
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; // 4 MHz
+ RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; // 48 MHz
+ #ifndef USBCON
+ // When the HSI is used as a PLL clock input, the maximum
+ // system clock frequency that can be achieved is 64 MHz.
+ RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz, stay close to 72 for delay()
+ #endif
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
+ // Initializes the CPU, AHB and APB busses clocks
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ // FLASH_LATENCY_1 may cause boot loops
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK) {
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
+ PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
+ PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; // requires 48 MHz
+ #ifndef USBCON
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;// No USB, RTC nor I2S
+ PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; // 2 4 6 8
+ #endif
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) {
+ ret = true;
+ }
+ }
+ }
+ return ret;
+}
+
+void SystemClock_Config(void)
+{
+ /*
+ * If HSE_VALUE is not 8MHz and you want use it, then:
+ * - Redefine HSE_VALUE to the correct HSE_VALUE
+ * - Redefine SystemClock_Config() with the correct settings
+ */
+#if HSE_VALUE == 8000000U
+ // 1- Try to start with HSE and external 8MHz xtal
+ if (SetSysClock_PLL_HSE(false) == false) {
+ // 2- If fail try to start with HSE and external clock
+ if (SetSysClock_PLL_HSE(true) == false) {
+#endif
+ // 3- If fail start with HSI clock
+ if (SetSysClock_PLL_HSI() == false) {
+ Error_Handler();
+ }
+#if HSE_VALUE == 8000000U
+ }
+ }
+#endif
+}
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.h b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.h
new file mode 100644
index 00000000000..b0f2ddf0c22
--- /dev/null
+++ b/buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.h
@@ -0,0 +1,175 @@
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif // __cplusplus
+
+// STM32F103VET6 | DIGITAL | ANALOG | USART | TWI | SPI | SPECIAL |
+//------------------|-------------|---------------|------------|-----------|----------------------|------------|
+#define PA0 0 // | | A0 Nozzle T°c | | | | |
+#define PA1 1 // | | A1 Bed T°c | | | | |
+#define PA2 2 // | | | USART2_TX | | | |
+#define PA3 3 // | | DAC_OUT1** | USART2_RX | | | |
+#define PA4 4 // | | DAC_OUT2** | | | SPI1_SS*(wired?) | |
+#define PA5 5 // | O | | | | SPI1_SCK EEPROM | |
+#define PA6 6 // | I | | | | SPI1_MISO EEPROM | |
+#define PA7 7 // | O | | | | SPI1_MOSI EEPROM | |
+#define PA8 8 // | Od BED | | | | | |
+#define PA9 9 // | | | USART1_TX | | | |
+#define PA10 10 // | | | USART1_RX | | | |
+#define PA11 11 // | I | | | | | USB_DM |
+#define PA12 12 // | I | | | | | USB_DP |
+#define PA13 13 // | I | | | | | SWD_SWDIO |
+#define PA14 14 // | I | | | | | SWD_SWCLK |
+#define PA15 15 // | Od FAN | | | | | |
+// |-------------|---------------|------------|-----------|----------------------|------------|
+#define PB0 16 // | | | | | | |
+#define PB1 17 // | | | | | | |
+#define PB2 18 // | I+ | | | | | BOOT1 |
+#define PB3 19 // | O X_DIR | | | | | |
+#define PB4 20 // | O X_STEP | | | | | |
+#define PB5 21 // | O X_EN | | | | | |
+#define PB6 22 // | O Y_DIR | | | | | |
+#define PB7 23 // | O Y_STEP | | | | | |
+#define PB8 24 // | O Y_EN | | | | | |
+#define PB9 25 // | O Z_DIR | | | | | |
+#define PB10 26 // | I+ | | USART3_TX* | TWI2_SCL* | | |
+#define PB11 27 // | I+ | | USART3_RX* | TWI2_SDA* | | |
+#define PB12 28 // | O TFT | | | | SPI2_SS | TOUCH_CS |
+#define PB13 29 // | O TFT | | | | SPI2_SCK | TOUCH_SCK |
+#define PB14 30 // | O TFT | | | | SPI2_MISO (bad>MOSI) | TOUCH_MOSI |
+#define PB15 31 // | I TFT | | | | SPI2_MOSI (bad>MISO) | TOUCH_MISO |
+// |-------------|---------------|------------|-----------|----------------------|------------|
+#define PC0 32 // | I E_OUT | | | | | |
+#define PC1 33 // | I+ X_MIN | | | | | |
+#define PC2 34 // | O LED | | | | | |
+#define PC3 35 // | I+ | | | | | |
+#define PC4 36 // | O TFT | | | | | TFT RESET |
+#define PC5 37 // | O CS1 | | | | for SPI1 EEPROM CS | |
+#define PC6 38 // | I TFT | | | | | TOUCH_INT |
+#define PC7 39 // | | | | | | |
+#define PC8 40 // | x SDIO | | | | | SD_D0 |
+#define PC9 41 // | x SDIO | | | | | SD_D1 |
+#define PC10 42 // | x SDIO | | | | | SD_D2 |
+#define PC11 43 // | x SDIO | | | | | SD_D3 |
+#define PC12 44 // | O SDIO | | | | | SD_CLK |
+#define PC13 45 // | I | | | | | |
+#define PC14 46 // | I+ Y_MAX | | | | | |
+#define PC15 47 // | I+ Y_MIN | | | | | |
+// |-------------|---------------|------------|-----------|----------------------|------------|
+#define PD0 48 // | O TFT | | | | | OSC_IN D2 |
+#define PD1 49 // | O TFT | | | | | OSC_OUT D3 |
+#define PD2 50 // | O SDIO | | | | | SD_CMD |
+#define PD3 51 // | Od NOZZLE | | | | | |
+#define PD4 52 // | O TFT | | | | | FSMC_NOE |
+#define PD5 53 // | O TFT | | | | | FSMC_NWE |
+#define PD6 54 // | I wired?* | | | | | FSMC_NWAIT*|
+#define PD7 55 // | O TFT | | | | | FSMC_NE1/CS|
+#define PD8 56 // | O TFT | | | | | FSMC_D13 |
+#define PD9 57 // | O TFT | | | | | FSMC_D14 |
+#define PD10 58 // | O TFT | | | | | FSMC_D15 |
+#define PD11 59 // | O TFT | | | | | FSMC_A16 |
+#define PD12 60 // | O TFT | | | | | TFT BL |
+#define PD13 61 // | Od PWM* | | | | | SERVO0 |
+#define PD14 62 // | O TFT | | | | | FSMC_D00 |
+#define PD15 63 // | O TFT | | | | | FSMC_D01 |
+// |-------------|---------------|------------|-----------|----------------------|------------|
+#define PE0 64 // | O Z_STEP | | | | | |
+#define PE1 65 // | O Z_EN | | | | | |
+#define PE2 66 // | O E0_DIR | | | | | |
+#define PE3 67 // | O E0_STEP | | | | | |
+#define PE4 68 // | O E0_EN | | | | | |
+#define PE5 69 // | I+ Z_MAX | | | | | |
+#define PE6 70 // | I+ Z_MIN | | | | | |
+#define PE7 71 // | O TFT | | | | | FSMC_D04 |
+#define PE8 72 // | O TFT | | | | | FSMC_D05 |
+#define PE9 73 // | O TFT | | | | | FSMC_D06 |
+#define PE10 74 // | O TFT | | | | | FSMC_D07 |
+#define PE11 75 // | O TFT | | | | | FSMC_D08 |
+#define PE12 76 // | O TFT | | | | | FSMC_D09 |
+#define PE13 77 // | O TFT | | | | | FSMC_D10 |
+#define PE14 78 // | O TFT | | | | | FSMC_D11 |
+#define PE15 79 // | O TFT | | | | | FSMC_D12 |
+//------------------|-------------|---------------|------------|-----------|----------------------|------------|
+
+// This must be a literal
+#define NUM_DIGITAL_PINS 80
+#define NUM_ANALOG_INPUTS 16 // 2 first are used, but cant be reduced to 2...
+
+// On-board LED pin number
+#ifndef LED_BUILTIN
+#define LED_BUILTIN PC2
+#endif
+
+// On-board user button (not wired)
+#ifndef USER_BTN
+#define USER_BTN PC13
+#endif
+
+// SPI Definition (SPI1 EEPROM)
+#define PIN_SPI_SS PC5
+#define PIN_SPI_MOSI PA7
+#define PIN_SPI_MISO PA6
+#define PIN_SPI_SCK PA5
+
+// I2C Definition (Unused)
+#define PIN_WIRE_SDA PB11
+#define PIN_WIRE_SCL PB10
+
+// Timer Definitions
+// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
+#ifndef TIMER_TONE
+ #define TIMER_TONE TIM6
+#endif
+#ifndef TIMER_SERVO
+ #define TIMER_SERVO TIM7
+#endif
+
+// UART Definitions
+// Define here Serial instance number to map on Serial generic name
+#define SERIAL_UART_INSTANCE 1
+
+// Default pin used for 'Serial' instance (linked to CH340 USB port)
+#define PIN_SERIAL_RX PA10
+#define PIN_SERIAL_TX PA9
+#define PIN_SERIAL1_RX PA10
+#define PIN_SERIAL1_TX PA9
+// Default pin used for 'Serial2' instance (connector exists but unsoldered)
+#define PIN_SERIAL2_RX PA3
+#define PIN_SERIAL2_TX PA2
+
+// Extra HAL modules
+#if defined(STM32F103xE)
+//#define HAL_DAC_MODULE_ENABLED (unused or maybe for the eeprom write?)
+#define HAL_SD_MODULE_ENABLED
+#define HAL_SRAM_MODULE_ENABLED
+#endif
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+/*----------------------------------------------------------------------------
+ * Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+ // These serial port names are intended to allow libraries and architecture-neutral
+ // sketches to automatically default to the correct port name for a particular type
+ // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+ // the first hardware serial port whose RX/TX pins are not dedicated to another use.
+ //
+ // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
+ //
+ // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
+ //
+ // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
+ //
+ // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
+ //
+ // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
+ // pins are NOT connected to anything by default.
+ #define SERIAL_PORT_MONITOR Serial1
+ #define SERIAL_PORT_HARDWARE Serial1
+ #define SERIAL_PORT_HARDWARE_OPEN Serial2
+#endif
+
diff --git a/ini/stm32f1.ini b/ini/stm32f1.ini
index 029763b9edd..1185e8f84d8 100644
--- a/ini/stm32f1.ini
+++ b/ini/stm32f1.ini
@@ -330,19 +330,19 @@ upload_protocol = serial
#
[env:STM32F103VE_longer]
platform = ${common_stm32.platform}
+lib_deps = ${common.lib_deps}
+ https://github.com/tpruvot/STM32_Servo_OpenDrain/archive/2.0.zip
extends = stm32_variant
board = genericSTM32F103VE
-board_build.variant = MARLIN_F103Vx
+board_build.variant = MARLIN_F103VE_LONGER
board_build.rename = project.bin
board_build.offset = 0x10000
board_upload.offset_address = 0x08010000
-build_flags = ${stm32_variant.build_flags}
- -DMCU_STM32F103VE -DU20 -DTS_V12 -DLED_BUILTIN=PC2 -UPIN_WIRE_SDA
- -UPIN_WIRE_SCL -DPIN_WIRE_SDA=PB11 -DPIN_WIRE_SCL=PB10
- -DHAL_DAC_MODULE_DISABLED -DHAL_I2S_MODULE_DISABLED
-build_unflags = ${stm32_variant.build_unflags}
- -DUSBCON -DUSBD_USE_CDC -DHAL_PCD_MODULE_ENABLED
+build_flags = ${stm32_variant.build_flags} -DMCU_STM32F103VE -DU20 -DTS_V12
+build_unflags = ${stm32_variant.build_unflags} -DUSBCON -DUSBD_USE_CDC -DHAL_PCD_MODULE_ENABLED
extra_scripts = ${stm32_variant.extra_scripts}
+monitor_speed = 250000
+debug_tool = stlink
#
# TRIGORILLA PRO (STM32F103ZET6)