diff --git a/Marlin/src/HAL/HAL_STM32F1/HAL_sdio_STM32F1.cpp b/Marlin/src/HAL/HAL_STM32F1/HAL_sdio_STM32F1.cpp
index d7aa3ccd20..a6627f0e61 100644
--- a/Marlin/src/HAL/HAL_STM32F1/HAL_sdio_STM32F1.cpp
+++ b/Marlin/src/HAL/HAL_STM32F1/HAL_sdio_STM32F1.cpp
@@ -21,7 +21,11 @@
  *
  */
 
-#if defined(ARDUINO_ARCH_STM32F1) && (defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY))
+#ifdef ARDUINO_ARCH_STM32F1
+
+#include <libmaple/stm32.h>
+
+#if defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY)
 
 #include "HAL_sdio_STM32F1.h"
 
@@ -276,4 +280,5 @@ bool SDIO_GetCmdResp7(void) {
   return true;
 }
 
-#endif // ARDUINO_ARCH_STM32F1 && (STM32_HIGH_DENSITY || STM32_XL_DENSITY)
+#endif // STM32_HIGH_DENSITY || STM32_XL_DENSITY
+#endif // ARDUINO_ARCH_STM32F1
diff --git a/Marlin/src/HAL/HAL_STM32F1/u8g_com_stm32duino_fsmc.cpp b/Marlin/src/HAL/HAL_STM32F1/u8g_com_stm32duino_fsmc.cpp
index 5cbf5a2243..49aced9102 100644
--- a/Marlin/src/HAL/HAL_STM32F1/u8g_com_stm32duino_fsmc.cpp
+++ b/Marlin/src/HAL/HAL_STM32F1/u8g_com_stm32duino_fsmc.cpp
@@ -26,10 +26,10 @@
  * Communication interface for FSMC
  */
 
-#if defined(ARDUINO_ARCH_STM32F1) && (defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY))
-
 #include "../../inc/MarlinConfig.h"
 
+#if defined(ARDUINO_ARCH_STM32F1) && (defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY))
+
 #if HAS_GRAPHICAL_LCD
 
 #include "U8glib.h"
@@ -226,14 +226,19 @@ void LCD_IO_Init(uint8_t cs, uint8_t rs) {
   gpio_set_mode(GPIOD,  9, GPIO_AF_OUTPUT_PP);  // FSMC_D14
   gpio_set_mode(GPIOD, 10, GPIO_AF_OUTPUT_PP);  // FSMC_D15
 
-  gpio_set_mode(GPIOD,  4, GPIO_AF_OUTPUT_PP);   // FSMC_NOE
-  gpio_set_mode(GPIOD,  5, GPIO_AF_OUTPUT_PP);   // FSMC_NWE
+  gpio_set_mode(GPIOD,  4, GPIO_AF_OUTPUT_PP);  // FSMC_NOE
+  gpio_set_mode(GPIOD,  5, GPIO_AF_OUTPUT_PP);  // FSMC_NWE
 
   gpio_set_mode(PIN_MAP[cs].gpio_device, PIN_MAP[cs].gpio_bit, GPIO_AF_OUTPUT_PP);  //FSMC_CS_NEx
   gpio_set_mode(PIN_MAP[rs].gpio_device, PIN_MAP[rs].gpio_bit, GPIO_AF_OUTPUT_PP);  //FSMC_RS_Ax
 
-  FSMC_NOR_PSRAM4_BASE->BCR = FSMC_BCR_WREN | FSMC_BCR_MTYP_SRAM | FSMC_BCR_MWID_16BITS | FSMC_BCR_MBKEN;
-  FSMC_NOR_PSRAM4_BASE->BTR = (FSMC_DATA_SETUP_TIME << 8) | FSMC_ADDRESS_SETUP_TIME;
+  #ifdef STM32_XL_DENSITY
+    FSMC_NOR_PSRAM4_BASE->BCR = FSMC_BCR_WREN | FSMC_BCR_MTYP_SRAM | FSMC_BCR_MWID_16BITS | FSMC_BCR_MBKEN;
+    FSMC_NOR_PSRAM4_BASE->BTR = (FSMC_DATA_SETUP_TIME << 8) | FSMC_ADDRESS_SETUP_TIME;
+  #else // PSRAM1 for STM32F103V (high density)
+    FSMC_NOR_PSRAM1_BASE->BCR = FSMC_BCR_WREN | FSMC_BCR_MTYP_SRAM | FSMC_BCR_MWID_16BITS | FSMC_BCR_MBKEN;
+    FSMC_NOR_PSRAM1_BASE->BTR = (FSMC_DATA_SETUP_TIME << 8) | FSMC_ADDRESS_SETUP_TIME;
+  #endif
 
   afio_remap(AFIO_REMAP_FSMC_NADV);