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Add macros for ST7565 commands
This commit is contained in:
Scott Lahteine
parent
d3c02410a8
commit
61181b7f24
@ -65,77 +65,90 @@
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#define HEIGHT 64
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#define PAGE_HEIGHT 8
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#define ST7565_ADC_REVERSE(N) (0xA0 | ((N) & 0x1))
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#define ST7565_BIAS_MODE(N) (0xA2 | ((N) & 0x1))
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#define ST7565_ALL_PIX(N) (0xA4 | ((N) & 0x1))
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#define ST7565_INVERTED(N) (0xA6 | ((N) & 0x1))
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#define ST7565_ON(N) (0xAE | ((N) & 0x1))
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#define ST7565_OUT_MODE(N) (0xC0 | ((N) & 0x1) << 3)
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#define ST7565_POWER_CONTROL(N) (0x28 | (N))
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#define ST7565_V0_RATIO(N) (0x20 | ((N) & 0x7))
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#define ST7565_CONTRAST(N) (0x81), (N)
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#define ST7565_COLUMN_ADR(N) (0x10 | ((N) >> 4) & 0xF), (0x00 | ((N) & 0xF))
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#define ST7565_PAGE_ADR(N) (0xB0 | (N))
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#define ST7565_START_LINE(N) (0x40 | (N))
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#define ST7565_SLEEP_MODE() (0xAC)
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#define ST7565_NOOP() (0xE3)
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/* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
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static const uint8_t u8g_dev_st7565_64128n_HAL_init_seq[] PROGMEM = {
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U8G_ESC_CS(0), // disable chip
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U8G_ESC_ADR(0), // instruction mode
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U8G_ESC_CS(1), // enable chip
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U8G_ESC_RST(15), // do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
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U8G_ESC_CS(0), // disable chip
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U8G_ESC_ADR(0), // instruction mode
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U8G_ESC_CS(1), // enable chip
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U8G_ESC_RST(15), // do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
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0x0A2, // 0x0A2: LCD bias 1/9 (according to Displaytech 64128N datasheet)
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0x0A0, // Normal ADC Select (according to Displaytech 64128N datasheet)
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ST7565_BIAS_MODE(0), // 0xA2: LCD bias 1/9 (according to Displaytech 64128N datasheet)
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ST7565_ADC_REVERSE(0), // Normal ADC Select (according to Displaytech 64128N datasheet)
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0x0C8, // common output mode: set scan direction normal operation/SHL Select, 0x0C0 --> SHL = 0, normal, 0x0C8 --> SHL = 1
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0x040, // Display start line for Displaytech 64128N
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ST7565_OUT_MODE(1), // common output mode: set scan direction normal operation/SHL Select, 0x0C0 --> SHL = 0, normal, 0x0C8 --> SHL = 1
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ST7565_START_LINE(0), // Display start line for Displaytech 64128N
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0x028 | 0x04, // power control: turn on voltage converter
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U8G_ESC_DLY(50), // delay 50 ms
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//0x028 | 0x04, // power control: turn on voltage converter
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//U8G_ESC_DLY(50), // delay 50 ms
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0x028 | 0x06, // power control: turn on voltage regulator
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U8G_ESC_DLY(50), // delay 50 ms
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//0x028 | 0x06, // power control: turn on voltage regulator
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//U8G_ESC_DLY(50), // delay 50 ms
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0x028 | 0x07, // power control: turn on voltage follower
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U8G_ESC_DLY(50), // delay 50 ms
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ST7565_POWER_CONTROL(0x7), // power control: turn on voltage follower
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U8G_ESC_DLY(50), // delay 50 ms
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0x010, // Set V0 voltage resistor ratio. Setting for controlling brightness of Displaytech 64128N
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ST7565_V0_RATIO(0), // Set V0 voltage resistor ratio. Setting for controlling brightness of Displaytech 64128N
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0x0A6, // display normal, bit val 0: LCD pixel off.
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ST7565_INVERTED(0), // display normal, bit val 0: LCD pixel off.
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0x081, // set contrast
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0x01E, // Contrast value. Setting for controlling brightness of Displaytech 64128N
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ST7565_CONTRAST(0x1E), // Contrast value. Setting for controlling brightness of Displaytech 64128N
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ST7565_ON(1), // display on
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0x0AF, // display on
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U8G_ESC_DLY(100), // delay 100 ms
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0x0A5, // display all points, ST7565
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U8G_ESC_DLY(100), // delay 100 ms
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U8G_ESC_DLY(100), // delay 100 ms
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0x0A4, // normal display
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U8G_ESC_CS(0), // disable chip
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U8G_ESC_END // end of sequence
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U8G_ESC_DLY(100), // delay 100 ms
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ST7565_ALL_PIX(1), // display all points, ST7565
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U8G_ESC_DLY(100), // delay 100 ms
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U8G_ESC_DLY(100), // delay 100 ms
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ST7565_ALL_PIX(0), // normal display
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U8G_ESC_CS(0), // disable chip
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U8G_ESC_END // end of sequence
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};
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static const uint8_t u8g_dev_st7565_64128n_HAL_data_start[] PROGMEM = {
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U8G_ESC_ADR(0), // instruction mode
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U8G_ESC_CS(1), // enable chip
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0x010, // set upper 4 bit of the col adr to 0x10
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0x000, // set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N
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U8G_ESC_END // end of sequence
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U8G_ESC_ADR(0), // instruction mode
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U8G_ESC_CS(1), // enable chip
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ST7565_COLUMN_ADR(0x00), // high 4 bits to 0, low 4 bits to 0. Changed for DisplayTech 64128N
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U8G_ESC_END // end of sequence
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};
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static const uint8_t u8g_dev_st7565_64128n_HAL_sleep_on[] PROGMEM = {
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U8G_ESC_ADR(0), // instruction mode
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U8G_ESC_CS(1), // enable chip
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0x0AC, // static indicator off
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0x000, // indicator register set (not sure if this is required)
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0x0AE, // display off
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0x0A5, // all points on
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U8G_ESC_CS(0), // disable chip, bugfix 12 nov 2014
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U8G_ESC_END // end of sequence
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U8G_ESC_ADR(0), // instruction mode
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U8G_ESC_CS(1), // enable chip
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ST7565_SLEEP_MODE(), // static indicator off
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//0x000, // indicator register set (not sure if this is required)
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ST7565_ON(0), // display off
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ST7565_ALL_PIX(1), // all points on
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U8G_ESC_CS(0), // disable chip, bugfix 12 nov 2014
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U8G_ESC_END // end of sequence
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};
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static const uint8_t u8g_dev_st7565_64128n_HAL_sleep_off[] PROGMEM = {
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U8G_ESC_ADR(0), // instruction mode
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U8G_ESC_CS(1), // enable chip
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0x0A4, // all points off
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0x0AF, // display on
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U8G_ESC_DLY(50), // delay 50 ms
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U8G_ESC_CS(0), // disable chip, bugfix 12 nov 2014
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U8G_ESC_END // end of sequence
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U8G_ESC_ADR(0), // instruction mode
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U8G_ESC_CS(1), // enable chip
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ST7565_ALL_PIX(0), // all points off
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ST7565_ON(1), // display on
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U8G_ESC_DLY(50), // delay 50 ms
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U8G_ESC_CS(0), // disable chip, bugfix 12 nov 2014
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U8G_ESC_END // end of sequence
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};
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uint8_t u8g_dev_st7565_64128n_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
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uint8_t u8g_dev_st7565_64128n_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, const uint8_t msg, void *arg) {
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switch(msg) {
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case U8G_DEV_MSG_INIT:
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u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
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@ -146,10 +159,9 @@ uint8_t u8g_dev_st7565_64128n_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, vo
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case U8G_DEV_MSG_PAGE_NEXT: {
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u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_data_start);
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u8g_WriteByte(u8g, dev, 0x0B0 | pb->p.page); /* select current page (ST7565R) */
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u8g_WriteByte(u8g, dev, ST7565_PAGE_ADR(pb->p.page)); /* select current page (ST7565R) */
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u8g_SetAddress(u8g, dev, 1); /* data mode */
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if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
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return 0;
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if (!u8g_pb_WriteBuffer(pb, u8g, dev)) return 0;
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u8g_SetChipSelect(u8g, dev, 0);
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}
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break;
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@ -170,7 +182,7 @@ uint8_t u8g_dev_st7565_64128n_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, vo
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return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
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}
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uint8_t u8g_dev_st7565_64128n_HAL_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
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uint8_t u8g_dev_st7565_64128n_HAL_2x_fn(u8g_t *u8g, u8g_dev_t *dev, const uint8_t msg, void *arg) {
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switch(msg) {
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case U8G_DEV_MSG_INIT:
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u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
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@ -182,13 +194,13 @@ uint8_t u8g_dev_st7565_64128n_HAL_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg,
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u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_data_start);
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u8g_WriteByte(u8g, dev, 0x0B0 | (2*pb->p.page)); /* select current page (ST7565R) */
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u8g_WriteByte(u8g, dev, ST7565_PAGE_ADR(2 * pb->p.page)); /* select current page (ST7565R) */
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u8g_SetAddress(u8g, dev, 1); /* data mode */
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u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)pb->buf);
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u8g_SetChipSelect(u8g, dev, 0);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_data_start);
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u8g_WriteByte(u8g, dev, 0x0B0 | (2*pb->p.page+1)); /* select current page (ST7565R) */
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u8g_WriteByte(u8g, dev, ST7565_PAGE_ADR(2 * pb->p.page + 1)); /* select current page (ST7565R) */
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u8g_SetAddress(u8g, dev, 1); /* data mode */
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u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width);
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u8g_SetChipSelect(u8g, dev, 0);
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