mirror of
https://github.com/MarlinFirmware/Marlin.git
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🎨 Detab C/C++
This commit is contained in:
Scott Lahteine
parent
3b681f7b74
commit
70288c6c4f
19 changed files with 1415 additions and 1554 deletions
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@ -108,31 +108,23 @@ struct genclk_config {
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uint32_t ctrl;
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};
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static inline void genclk_config_defaults(struct genclk_config *p_cfg,
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uint32_t ul_id)
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{
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static inline void genclk_config_defaults(struct genclk_config *p_cfg, uint32_t ul_id) {
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ul_id = ul_id;
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p_cfg->ctrl = 0;
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}
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static inline void genclk_config_read(struct genclk_config *p_cfg,
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uint32_t ul_id)
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{
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static inline void genclk_config_read(struct genclk_config *p_cfg, uint32_t ul_id) {
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p_cfg->ctrl = PMC->PMC_PCK[ul_id];
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}
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static inline void genclk_config_write(const struct genclk_config *p_cfg,
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uint32_t ul_id)
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{
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static inline void genclk_config_write(const struct genclk_config *p_cfg, uint32_t ul_id) {
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PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
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}
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//! \name Programmable Clock Source and Prescaler configuration
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//@{
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static inline void genclk_config_set_source(struct genclk_config *p_cfg,
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enum genclk_source e_src)
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{
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static inline void genclk_config_set_source(struct genclk_config *p_cfg, enum genclk_source e_src) {
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p_cfg->ctrl &= (~PMC_PCK_CSS_Msk);
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switch (e_src) {
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@ -164,29 +156,23 @@ static inline void genclk_config_set_source(struct genclk_config *p_cfg,
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}
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}
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static inline void genclk_config_set_divider(struct genclk_config *p_cfg,
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uint32_t e_divider)
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{
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static inline void genclk_config_set_divider(struct genclk_config *p_cfg, uint32_t e_divider) {
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p_cfg->ctrl &= ~PMC_PCK_PRES_Msk;
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p_cfg->ctrl |= e_divider;
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}
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//@}
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static inline void genclk_enable(const struct genclk_config *p_cfg,
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uint32_t ul_id)
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{
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static inline void genclk_enable(const struct genclk_config *p_cfg, uint32_t ul_id) {
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PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
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pmc_enable_pck(ul_id);
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}
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static inline void genclk_disable(uint32_t ul_id)
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{
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static inline void genclk_disable(uint32_t ul_id) {
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pmc_disable_pck(ul_id);
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}
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static inline void genclk_enable_source(enum genclk_source e_src)
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{
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static inline void genclk_enable_source(enum genclk_source e_src) {
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switch (e_src) {
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case GENCLK_PCK_SRC_SLCK_RC:
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if (!osc_is_ready(OSC_SLCK_32K_RC)) {
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@ -115,8 +115,7 @@ extern "C" {
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#define OSC_MAINCK_BYPASS_HZ BOARD_FREQ_MAINCK_BYPASS //!< External bypass oscillator.
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//@}
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static inline void osc_enable(uint32_t ul_id)
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{
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static inline void osc_enable(uint32_t ul_id) {
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switch (ul_id) {
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case OSC_SLCK_32K_RC:
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break;
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@ -157,8 +156,7 @@ static inline void osc_enable(uint32_t ul_id)
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}
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}
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static inline void osc_disable(uint32_t ul_id)
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{
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static inline void osc_disable(uint32_t ul_id) {
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switch (ul_id) {
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case OSC_SLCK_32K_RC:
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case OSC_SLCK_32K_XTAL:
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@ -181,8 +179,7 @@ static inline void osc_disable(uint32_t ul_id)
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}
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}
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static inline bool osc_is_ready(uint32_t ul_id)
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{
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static inline bool osc_is_ready(uint32_t ul_id) {
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switch (ul_id) {
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case OSC_SLCK_32K_RC:
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return 1;
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@ -202,8 +199,7 @@ static inline bool osc_is_ready(uint32_t ul_id)
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return 0;
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}
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static inline uint32_t osc_get_rate(uint32_t ul_id)
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{
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static inline uint32_t osc_get_rate(uint32_t ul_id) {
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switch (ul_id) {
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case OSC_SLCK_32K_RC:
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return OSC_SLCK_32K_RC_HZ;
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@ -241,8 +237,7 @@ static inline uint32_t osc_get_rate(uint32_t ul_id)
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*
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* \param id A number identifying the oscillator to wait for.
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*/
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static inline void osc_wait_ready(uint8_t id)
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{
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static inline void osc_wait_ready(uint8_t id) {
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while (!osc_is_ready(id)) {
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/* Do nothing */
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}
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@ -113,15 +113,15 @@ struct pll_config {
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* is hidden in this implementation. Use mul as mul effective value.
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*/
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static inline void pll_config_init(struct pll_config *p_cfg,
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enum pll_source e_src, uint32_t ul_div, uint32_t ul_mul)
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{
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enum pll_source e_src, uint32_t ul_div, uint32_t ul_mul) {
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uint32_t vco_hz;
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Assert(e_src < PLL_NR_SOURCES);
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if (ul_div == 0 && ul_mul == 0) { /* Must only be true for UTMI PLL */
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p_cfg->ctrl = CKGR_UCKR_UPLLCOUNT(PLL_COUNT);
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} else { /* PLLA */
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}
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else { /* PLLA */
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/* Calculate internal VCO frequency */
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vco_hz = osc_get_rate(e_src) / ul_div;
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Assert(vco_hz >= PLL_INPUT_MIN_HZ);
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@ -142,68 +142,55 @@ static inline void pll_config_init(struct pll_config *p_cfg,
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CONFIG_PLL##pll_id##_DIV, \
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CONFIG_PLL##pll_id##_MUL)
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static inline void pll_config_read(struct pll_config *p_cfg, uint32_t ul_pll_id)
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{
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static inline void pll_config_read(struct pll_config *p_cfg, uint32_t ul_pll_id) {
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Assert(ul_pll_id < NR_PLLS);
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if (ul_pll_id == PLLA_ID) {
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p_cfg->ctrl = PMC->CKGR_PLLAR;
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} else {
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p_cfg->ctrl = PMC->CKGR_UCKR;
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}
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p_cfg->ctrl = ul_pll_id == PLLA_ID ? PMC->CKGR_PLLAR : PMC->CKGR_UCKR;
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}
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static inline void pll_config_write(const struct pll_config *p_cfg, uint32_t ul_pll_id)
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{
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static inline void pll_config_write(const struct pll_config *p_cfg, uint32_t ul_pll_id) {
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Assert(ul_pll_id < NR_PLLS);
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if (ul_pll_id == PLLA_ID) {
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pmc_disable_pllack(); // Always stop PLL first!
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PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl;
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} else {
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}
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else
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PMC->CKGR_UCKR = p_cfg->ctrl;
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}
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}
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static inline void pll_enable(const struct pll_config *p_cfg, uint32_t ul_pll_id)
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{
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static inline void pll_enable(const struct pll_config *p_cfg, uint32_t ul_pll_id) {
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Assert(ul_pll_id < NR_PLLS);
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if (ul_pll_id == PLLA_ID) {
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pmc_disable_pllack(); // Always stop PLL first!
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PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl;
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} else {
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PMC->CKGR_UCKR = p_cfg->ctrl | CKGR_UCKR_UPLLEN;
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}
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else
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PMC->CKGR_UCKR = p_cfg->ctrl | CKGR_UCKR_UPLLEN;
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}
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/**
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* \note This will only disable the selected PLL, not the underlying oscillator (mainck).
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*/
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static inline void pll_disable(uint32_t ul_pll_id)
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{
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static inline void pll_disable(uint32_t ul_pll_id) {
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Assert(ul_pll_id < NR_PLLS);
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if (ul_pll_id == PLLA_ID) {
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if (ul_pll_id == PLLA_ID)
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pmc_disable_pllack();
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} else {
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else
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PMC->CKGR_UCKR &= ~CKGR_UCKR_UPLLEN;
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}
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}
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static inline uint32_t pll_is_locked(uint32_t ul_pll_id)
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{
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static inline uint32_t pll_is_locked(uint32_t ul_pll_id) {
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Assert(ul_pll_id < NR_PLLS);
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if (ul_pll_id == PLLA_ID) {
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if (ul_pll_id == PLLA_ID)
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return pmc_is_locked_pllack();
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} else {
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else
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return pmc_is_locked_upll();
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}
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}
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static inline void pll_enable_source(enum pll_source e_src)
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{
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static inline void pll_enable_source(enum pll_source e_src) {
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switch (e_src) {
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case PLL_SRC_MAINCK_4M_RC:
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case PLL_SRC_MAINCK_8M_RC:
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@ -220,13 +207,11 @@ static inline void pll_enable_source(enum pll_source e_src)
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}
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}
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static inline void pll_enable_config_defaults(unsigned int ul_pll_id)
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{
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static inline void pll_enable_config_defaults(unsigned int ul_pll_id) {
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struct pll_config pllcfg;
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if (pll_is_locked(ul_pll_id)) {
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return; // Pll already running
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}
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if (pll_is_locked(ul_pll_id)) return; // Pll already running
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switch (ul_pll_id) {
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#ifdef CONFIG_PLL0_SOURCE
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case 0:
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@ -264,13 +249,10 @@ static inline void pll_enable_config_defaults(unsigned int ul_pll_id)
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* \retval STATUS_OK The PLL is now locked.
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* \retval ERR_TIMEOUT Timed out waiting for PLL to become locked.
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*/
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static inline int pll_wait_for_lock(unsigned int pll_id)
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{
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static inline int pll_wait_for_lock(unsigned int pll_id) {
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Assert(pll_id < NR_PLLS);
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while (!pll_is_locked(pll_id)) {
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/* Do nothing */
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}
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while (!pll_is_locked(pll_id)) { /* Do nothing */ }
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return 0;
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}
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@ -57,7 +57,6 @@
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#ifndef _SBC_PROTOCOL_H_
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#define _SBC_PROTOCOL_H_
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/**
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* \ingroup usb_msc_protocol
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* \defgroup usb_sbc_protocol SCSI Block Commands protocol definitions
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@ -200,7 +200,6 @@ enum scsi_vpd_page_code {
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#define SCSI_VPD_ID_TYPE_T10 1
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/* Sense keys */
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enum scsi_sense_key {
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SCSI_SK_NO_SENSE = 0x0,
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@ -272,7 +271,6 @@ struct spc_control_page_info_execpt {
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be32_t report_count;
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};
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enum scsi_spc_mode_sense_pc {
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SCSI_MS_SENSE_PC_CURRENT = 0,
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SCSI_MS_SENSE_PC_CHANGEABLE = 1,
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@ -280,20 +278,15 @@ enum scsi_spc_mode_sense_pc {
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SCSI_MS_SENSE_PC_SAVED = 3,
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};
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static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb)
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{
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static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb) {
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return (cdb[1] >> 3) & 1;
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}
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static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb)
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{
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static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb) {
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return cdb[2] & 0x3F;
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}
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static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb)
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{
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static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb) {
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return cdb[2] >> 6;
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}
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@ -172,8 +172,7 @@ extern "C" {
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}
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\endcode
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*/
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static inline bool udc_include_vbus_monitoring(void)
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{
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static inline bool udc_include_vbus_monitoring(void) {
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return udd_include_vbus_monitoring();
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}
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@ -192,32 +191,26 @@ void udc_stop(void);
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* then it will attach device when an acceptable Vbus
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* level from the host is detected.
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*/
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static inline void udc_attach(void)
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{
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static inline void udc_attach(void) {
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udd_attach();
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}
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/**
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* \brief Detaches the device from the bus
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*
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* The driver must remove pull-up on USB line D- or D+.
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*/
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static inline void udc_detach(void)
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{
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static inline void udc_detach(void) {
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udd_detach();
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}
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/*! \brief The USB driver sends a resume signal called \e "Upstream Resume"
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* This is authorized only when the remote wakeup feature is enabled by host.
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*/
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static inline void udc_remotewakeup(void)
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{
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static inline void udc_remotewakeup(void) {
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udd_send_remotewakeup();
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}
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/**
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* \brief Returns a pointer on the current interface descriptor
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*
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@ -92,8 +92,6 @@ extern "C" {
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#define UDC_BSS(x) COMPILER_ALIGNED(x)
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#endif
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/**
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* \brief Configuration descriptor and UDI link for one USB speed
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*/
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@ -104,7 +102,6 @@ typedef struct {
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udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis;
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} udc_config_speed_t;
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/**
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* \brief All information about the USB Device
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*/
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@ -103,20 +103,16 @@ typedef struct {
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extern udd_ctrl_request_t udd_g_ctrlreq;
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//! Return true if the setup request \a udd_g_ctrlreq indicates IN data transfer
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#define Udd_setup_is_in() \
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(USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
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#define Udd_setup_is_in() (USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
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//! Return true if the setup request \a udd_g_ctrlreq indicates OUT data transfer
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#define Udd_setup_is_out() \
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(USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
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#define Udd_setup_is_out() (USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
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//! Return the type of the SETUP request \a udd_g_ctrlreq. \see usb_reqtype.
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#define Udd_setup_type() \
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(udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK)
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#define Udd_setup_type() (udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK)
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//! Return the recipient of the SETUP request \a udd_g_ctrlreq. \see usb_recipient
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#define Udd_setup_recipient() \
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(udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK)
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#define Udd_setup_recipient() (udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK)
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/**
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* \brief End of halt callback function type.
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@ -134,8 +130,7 @@ typedef void (*udd_callback_halt_cleared_t)(void);
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* \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted
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* \param n number of data transferred
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*/
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typedef void (*udd_callback_trans_t) (udd_ep_status_t status,
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iram_size_t nb_transferred, udd_ep_id_t ep);
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typedef void (*udd_callback_trans_t) (udd_ep_status_t status, iram_size_t nb_transferred, udd_ep_id_t ep);
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/**
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* \brief Authorizes the VBUS event
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@ -239,8 +234,7 @@ void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size );
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*
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* \return \c 1 if the endpoint is enabled, otherwise \c 0.
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*/
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bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes,
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uint16_t MaxEndpointSize);
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bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, uint16_t MaxEndpointSize);
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/**
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* \brief Disables an endpoint
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@ -294,8 +288,7 @@ bool udd_ep_clear_halt(udd_ep_id_t ep);
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*
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* \return \c 1 if the register is accepted, otherwise \c 0.
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*/
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bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
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udd_callback_halt_cleared_t callback);
|
||||
bool udd_ep_wait_stall_clear(udd_ep_id_t ep, udd_callback_halt_cleared_t callback);
|
||||
|
||||
/**
|
||||
* \brief Allows to receive or send data on an endpoint
|
||||
|
|
@ -321,9 +314,8 @@ bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
|
|||
*
|
||||
* \return \c 1 if function was successfully done, otherwise \c 0.
|
||||
*/
|
||||
bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket,
|
||||
uint8_t * buf, iram_size_t buf_size,
|
||||
udd_callback_trans_t callback);
|
||||
bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, uint8_t * buf, iram_size_t buf_size, udd_callback_trans_t callback);
|
||||
|
||||
/**
|
||||
* \brief Aborts transfer on going on endpoint
|
||||
*
|
||||
|
|
@ -339,7 +331,6 @@ void udd_ep_abort(udd_ep_id_t ep);
|
|||
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name High speed test mode management
|
||||
*
|
||||
|
|
@ -352,7 +343,6 @@ void udd_test_mode_se0_nak(void);
|
|||
void udd_test_mode_packet(void);
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name UDC callbacks to provide for UDD
|
||||
*
|
||||
|
|
|
|||
|
|
@ -240,7 +240,6 @@ typedef struct {
|
|||
#define UDI_CDC_DATA_DESC_6_HS UDI_CDC_DATA_DESC_HS(6)
|
||||
//@}
|
||||
|
||||
|
||||
//! Content of CDC IAD interface descriptor for all speeds
|
||||
#define UDI_CDC_IAD_DESC(port) { \
|
||||
.bLength = sizeof(usb_iad_desc_t),\
|
||||
|
|
@ -627,18 +626,15 @@ iram_size_t udi_cdc_multi_write_buf(uint8_t port, const void* buf, iram_size_t s
|
|||
* Add to application C-file:
|
||||
* \code
|
||||
static bool my_flag_autorize_cdc_transfert = false;
|
||||
bool my_callback_cdc_enable(void)
|
||||
{
|
||||
bool my_callback_cdc_enable(void) {
|
||||
my_flag_autorize_cdc_transfert = true;
|
||||
return true;
|
||||
}
|
||||
void my_callback_cdc_disable(void)
|
||||
{
|
||||
void my_callback_cdc_disable(void) {
|
||||
my_flag_autorize_cdc_transfert = false;
|
||||
}
|
||||
|
||||
void task(void)
|
||||
{
|
||||
void task(void) {
|
||||
if (my_flag_autorize_cdc_transfert) {
|
||||
udi_cdc_putc('A');
|
||||
udi_cdc_getc();
|
||||
|
|
|
|||
|
|
@ -372,9 +372,7 @@ static void udi_msc_sbc_trans(bool b_read);
|
|||
|
||||
//@}
|
||||
|
||||
|
||||
bool udi_msc_enable(void)
|
||||
{
|
||||
bool udi_msc_enable(void) {
|
||||
uint8_t lun;
|
||||
udi_msc_b_trans_req = false;
|
||||
udi_msc_b_cbw_invalid = false;
|
||||
|
|
@ -397,18 +395,14 @@ bool udi_msc_enable(void)
|
|||
return true;
|
||||
}
|
||||
|
||||
|
||||
void udi_msc_disable(void)
|
||||
{
|
||||
void udi_msc_disable(void) {
|
||||
udi_msc_b_trans_req = false;
|
||||
udi_msc_b_ack_trans = true;
|
||||
udi_msc_b_reset_trans = true;
|
||||
UDI_MSC_DISABLE_EXT();
|
||||
}
|
||||
|
||||
|
||||
bool udi_msc_setup(void)
|
||||
{
|
||||
bool udi_msc_setup(void) {
|
||||
if (Udd_setup_is_in()) {
|
||||
// Requests Interface GET
|
||||
if (Udd_setup_type() == USB_REQ_TYPE_CLASS) {
|
||||
|
|
@ -451,17 +445,14 @@ bool udi_msc_setup(void)
|
|||
return false; // Not supported request
|
||||
}
|
||||
|
||||
uint8_t udi_msc_getsetting(void)
|
||||
{
|
||||
uint8_t udi_msc_getsetting(void) {
|
||||
return 0; // MSC don't have multiple alternate setting
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Routines to process CBW packet
|
||||
|
||||
static void udi_msc_cbw_invalid(void)
|
||||
{
|
||||
static void udi_msc_cbw_invalid(void) {
|
||||
if (!udi_msc_b_cbw_invalid)
|
||||
return; // Don't re-stall endpoint if error reset by setup
|
||||
udd_ep_set_halt(UDI_MSC_EP_OUT);
|
||||
|
|
@ -469,8 +460,7 @@ static void udi_msc_cbw_invalid(void)
|
|||
udd_ep_wait_stall_clear(UDI_MSC_EP_OUT, udi_msc_cbw_invalid);
|
||||
}
|
||||
|
||||
static void udi_msc_csw_invalid(void)
|
||||
{
|
||||
static void udi_msc_csw_invalid(void) {
|
||||
if (!udi_msc_b_cbw_invalid)
|
||||
return; // Don't re-stall endpoint if error reset by setup
|
||||
udd_ep_set_halt(UDI_MSC_EP_IN);
|
||||
|
|
@ -478,8 +468,7 @@ static void udi_msc_csw_invalid(void)
|
|||
udd_ep_wait_stall_clear(UDI_MSC_EP_IN, udi_msc_csw_invalid);
|
||||
}
|
||||
|
||||
static void udi_msc_cbw_wait(void)
|
||||
{
|
||||
static void udi_msc_cbw_wait(void) {
|
||||
// Register buffer and callback on OUT endpoint
|
||||
if (!udd_ep_run(UDI_MSC_EP_OUT, true,
|
||||
(uint8_t *) & udi_msc_cbw,
|
||||
|
|
@ -490,10 +479,8 @@ static void udi_msc_cbw_wait(void)
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_cbw_received(udd_ep_status_t status,
|
||||
iram_size_t nb_received, udd_ep_id_t ep)
|
||||
{
|
||||
iram_size_t nb_received, udd_ep_id_t ep) {
|
||||
UNUSED(ep);
|
||||
// Check status of transfer
|
||||
if (UDD_EP_TRANSFER_OK != status) {
|
||||
|
|
@ -582,9 +569,7 @@ static void udi_msc_cbw_received(udd_ep_status_t status,
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag)
|
||||
{
|
||||
static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag) {
|
||||
/*
|
||||
* The following cases should result in a phase error:
|
||||
* - Case 2: Hn < Di
|
||||
|
|
@ -612,12 +597,10 @@ static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag)
|
|||
return true;
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Routines to process small data packet
|
||||
|
||||
static void udi_msc_data_send(uint8_t * buffer, uint8_t buf_size)
|
||||
{
|
||||
static void udi_msc_data_send(uint8_t * buffer, uint8_t buf_size) {
|
||||
// Sends data on IN endpoint
|
||||
if (!udd_ep_run(UDI_MSC_EP_IN, true,
|
||||
buffer, buf_size, udi_msc_data_sent)) {
|
||||
|
|
@ -627,10 +610,8 @@ static void udi_msc_data_send(uint8_t * buffer, uint8_t buf_size)
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_data_sent(udd_ep_status_t status, iram_size_t nb_sent,
|
||||
udd_ep_id_t ep)
|
||||
{
|
||||
udd_ep_id_t ep) {
|
||||
UNUSED(ep);
|
||||
if (UDD_EP_TRANSFER_OK != status) {
|
||||
// Error protocol
|
||||
|
|
@ -644,12 +625,10 @@ static void udi_msc_data_sent(udd_ep_status_t status, iram_size_t nb_sent,
|
|||
udi_msc_csw_process();
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Routines to process CSW packet
|
||||
|
||||
static void udi_msc_csw_process(void)
|
||||
{
|
||||
static void udi_msc_csw_process(void) {
|
||||
if (0 != udi_msc_csw.dCSWDataResidue) {
|
||||
// Residue not NULL
|
||||
// then STALL next request from USB host on corresponding endpoint
|
||||
|
|
@ -664,9 +643,7 @@ static void udi_msc_csw_process(void)
|
|||
udi_msc_csw_send();
|
||||
}
|
||||
|
||||
|
||||
void udi_msc_csw_send(void)
|
||||
{
|
||||
void udi_msc_csw_send(void) {
|
||||
// Sends CSW on IN endpoint
|
||||
if (!udd_ep_run(UDI_MSC_EP_IN, false,
|
||||
(uint8_t *) & udi_msc_csw,
|
||||
|
|
@ -678,10 +655,8 @@ void udi_msc_csw_send(void)
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_csw_sent(udd_ep_status_t status, iram_size_t nb_sent,
|
||||
udd_ep_id_t ep)
|
||||
{
|
||||
udd_ep_id_t ep) {
|
||||
UNUSED(ep);
|
||||
UNUSED(status);
|
||||
UNUSED(nb_sent);
|
||||
|
|
@ -690,20 +665,17 @@ static void udi_msc_csw_sent(udd_ep_status_t status, iram_size_t nb_sent,
|
|||
udi_msc_cbw_wait();
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Routines manage sense data
|
||||
|
||||
static void udi_msc_clear_sense(void)
|
||||
{
|
||||
static void udi_msc_clear_sense(void) {
|
||||
memset((uint8_t*)&udi_msc_sense, 0, sizeof(struct scsi_request_sense_data));
|
||||
udi_msc_sense.valid_reponse_code = SCSI_SENSE_VALID | SCSI_SENSE_CURRENT;
|
||||
udi_msc_sense.AddSenseLen = SCSI_SENSE_ADDL_LEN(sizeof(udi_msc_sense));
|
||||
}
|
||||
|
||||
static void udi_msc_sense_fail(uint8_t sense_key, uint16_t add_sense,
|
||||
uint32_t lba)
|
||||
{
|
||||
uint32_t lba) {
|
||||
udi_msc_clear_sense();
|
||||
udi_msc_csw.bCSWStatus = USB_CSW_STATUS_FAIL;
|
||||
udi_msc_sense.sense_flag_key = sense_key;
|
||||
|
|
@ -715,53 +687,39 @@ static void udi_msc_sense_fail(uint8_t sense_key, uint16_t add_sense,
|
|||
udi_msc_sense.AddSnsCodeQlfr = add_sense;
|
||||
}
|
||||
|
||||
static void udi_msc_sense_pass(void)
|
||||
{
|
||||
static void udi_msc_sense_pass(void) {
|
||||
udi_msc_clear_sense();
|
||||
udi_msc_csw.bCSWStatus = USB_CSW_STATUS_PASS;
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_sense_fail_not_present(void)
|
||||
{
|
||||
static void udi_msc_sense_fail_not_present(void) {
|
||||
udi_msc_sense_fail(SCSI_SK_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT, 0);
|
||||
}
|
||||
|
||||
static void udi_msc_sense_fail_busy_or_change(void)
|
||||
{
|
||||
udi_msc_sense_fail(SCSI_SK_UNIT_ATTENTION,
|
||||
SCSI_ASC_NOT_READY_TO_READY_CHANGE, 0);
|
||||
static void udi_msc_sense_fail_busy_or_change(void) {
|
||||
udi_msc_sense_fail(SCSI_SK_UNIT_ATTENTION, SCSI_ASC_NOT_READY_TO_READY_CHANGE, 0);
|
||||
}
|
||||
|
||||
static void udi_msc_sense_fail_hardware(void)
|
||||
{
|
||||
udi_msc_sense_fail(SCSI_SK_HARDWARE_ERROR,
|
||||
SCSI_ASC_NO_ADDITIONAL_SENSE_INFO, 0);
|
||||
static void udi_msc_sense_fail_hardware(void) {
|
||||
udi_msc_sense_fail(SCSI_SK_HARDWARE_ERROR, SCSI_ASC_NO_ADDITIONAL_SENSE_INFO, 0);
|
||||
}
|
||||
|
||||
static void udi_msc_sense_fail_protected(void)
|
||||
{
|
||||
static void udi_msc_sense_fail_protected(void) {
|
||||
udi_msc_sense_fail(SCSI_SK_DATA_PROTECT, SCSI_ASC_WRITE_PROTECTED, 0);
|
||||
}
|
||||
|
||||
static void udi_msc_sense_fail_cdb_invalid(void)
|
||||
{
|
||||
udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST,
|
||||
SCSI_ASC_INVALID_FIELD_IN_CDB, 0);
|
||||
static void udi_msc_sense_fail_cdb_invalid(void) {
|
||||
udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST, SCSI_ASC_INVALID_FIELD_IN_CDB, 0);
|
||||
}
|
||||
|
||||
static void udi_msc_sense_command_invalid(void)
|
||||
{
|
||||
udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST,
|
||||
SCSI_ASC_INVALID_COMMAND_OPERATION_CODE, 0);
|
||||
static void udi_msc_sense_command_invalid(void) {
|
||||
udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST, SCSI_ASC_INVALID_COMMAND_OPERATION_CODE, 0);
|
||||
}
|
||||
|
||||
|
||||
// ------------------------
|
||||
//------- Routines manage SCSI Commands
|
||||
|
||||
static void udi_msc_spc_requestsense(void)
|
||||
{
|
||||
static void udi_msc_spc_requestsense(void) {
|
||||
uint8_t length = udi_msc_cbw.CDB[4];
|
||||
|
||||
// Can't send more than sense data length
|
||||
|
|
@ -774,9 +732,7 @@ static void udi_msc_spc_requestsense(void)
|
|||
udi_msc_data_send((uint8_t*)&udi_msc_sense, length);
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_spc_inquiry(void)
|
||||
{
|
||||
static void udi_msc_spc_inquiry(void) {
|
||||
uint8_t length, i;
|
||||
UDC_DATA(4)
|
||||
// Constant inquiry data for all LUNs
|
||||
|
|
@ -835,9 +791,7 @@ static void udi_msc_spc_inquiry(void)
|
|||
udi_msc_data_send((uint8_t *) & udi_msc_inquiry_data, length);
|
||||
}
|
||||
|
||||
|
||||
static bool udi_msc_spc_testunitready_global(void)
|
||||
{
|
||||
static bool udi_msc_spc_testunitready_global(void) {
|
||||
switch (mem_test_unit_ready(udi_msc_cbw.bCBWLUN)) {
|
||||
case CTRL_GOOD:
|
||||
return true; // Don't change sense data
|
||||
|
|
@ -855,9 +809,7 @@ static bool udi_msc_spc_testunitready_global(void)
|
|||
return false;
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_spc_testunitready(void)
|
||||
{
|
||||
static void udi_msc_spc_testunitready(void) {
|
||||
if (udi_msc_spc_testunitready_global()) {
|
||||
// LUN ready, then update sense data with status pass
|
||||
udi_msc_sense_pass();
|
||||
|
|
@ -866,9 +818,7 @@ static void udi_msc_spc_testunitready(void)
|
|||
udi_msc_csw_process();
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_spc_mode_sense(bool b_sense10)
|
||||
{
|
||||
static void udi_msc_spc_mode_sense(bool b_sense10) {
|
||||
// Union of all mode sense structures
|
||||
union sense_6_10 {
|
||||
struct {
|
||||
|
|
@ -943,9 +893,7 @@ static void udi_msc_spc_mode_sense(bool b_sense10)
|
|||
udi_msc_data_send((uint8_t *) & sense, request_lgt);
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_spc_prevent_allow_medium_removal(void)
|
||||
{
|
||||
static void udi_msc_spc_prevent_allow_medium_removal(void) {
|
||||
uint8_t prevent = udi_msc_cbw.CDB[4];
|
||||
if (0 == prevent) {
|
||||
udi_msc_sense_pass();
|
||||
|
|
@ -955,9 +903,7 @@ static void udi_msc_spc_prevent_allow_medium_removal(void)
|
|||
udi_msc_csw_process();
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_sbc_start_stop(void)
|
||||
{
|
||||
static void udi_msc_sbc_start_stop(void) {
|
||||
bool start = 0x1 & udi_msc_cbw.CDB[4];
|
||||
bool loej = 0x2 & udi_msc_cbw.CDB[4];
|
||||
if (loej) {
|
||||
|
|
@ -967,9 +913,7 @@ static void udi_msc_sbc_start_stop(void)
|
|||
udi_msc_csw_process();
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_sbc_read_capacity(void)
|
||||
{
|
||||
static void udi_msc_sbc_read_capacity(void) {
|
||||
UDC_BSS(4) static struct sbc_read_capacity10_data udi_msc_capacity;
|
||||
|
||||
if (!udi_msc_cbw_validate(sizeof(udi_msc_capacity),
|
||||
|
|
@ -1003,9 +947,7 @@ static void udi_msc_sbc_read_capacity(void)
|
|||
sizeof(udi_msc_capacity));
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_sbc_trans(bool b_read)
|
||||
{
|
||||
static void udi_msc_sbc_trans(bool b_read) {
|
||||
uint32_t trans_size;
|
||||
|
||||
if (!b_read) {
|
||||
|
|
@ -1038,9 +980,7 @@ static void udi_msc_sbc_trans(bool b_read)
|
|||
UDI_MSC_NOTIFY_TRANS_EXT();
|
||||
}
|
||||
|
||||
|
||||
bool udi_msc_process_trans(void)
|
||||
{
|
||||
bool udi_msc_process_trans(void) {
|
||||
Ctrl_status status;
|
||||
|
||||
if (!udi_msc_b_trans_req)
|
||||
|
|
@ -1084,10 +1024,8 @@ bool udi_msc_process_trans(void)
|
|||
return true;
|
||||
}
|
||||
|
||||
|
||||
static void udi_msc_trans_ack(udd_ep_status_t status, iram_size_t n,
|
||||
udd_ep_id_t ep)
|
||||
{
|
||||
udd_ep_id_t ep) {
|
||||
UNUSED(ep);
|
||||
UNUSED(n);
|
||||
// Update variable to signal the end of transfer
|
||||
|
|
@ -1095,10 +1033,8 @@ static void udi_msc_trans_ack(udd_ep_status_t status, iram_size_t n,
|
|||
udi_msc_b_ack_trans = true;
|
||||
}
|
||||
|
||||
|
||||
bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
||||
void (*callback) (udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep))
|
||||
{
|
||||
void (*callback) (udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)) {
|
||||
if (!udi_msc_b_ack_trans)
|
||||
return false; // No possible, transfer on going
|
||||
|
||||
|
|
|
|||
|
|
@ -129,7 +129,6 @@ typedef struct {
|
|||
}
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \ingroup udi_group
|
||||
* \defgroup udi_msc_group USB Device Interface (UDI) for Mass Storage Class (MSC)
|
||||
|
|
@ -170,7 +169,6 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
|||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* \page udi_msc_quickstart Quick start guide for USB device Mass Storage module (UDI MSC)
|
||||
*
|
||||
|
|
@ -215,18 +213,15 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
|||
* Add to application C-file:
|
||||
* \code
|
||||
static bool my_flag_autorize_msc_transfert = false;
|
||||
bool my_callback_msc_enable(void)
|
||||
{
|
||||
bool my_callback_msc_enable(void) {
|
||||
my_flag_autorize_msc_transfert = true;
|
||||
return true;
|
||||
}
|
||||
void my_callback_msc_disable(void)
|
||||
{
|
||||
void my_callback_msc_disable(void) {
|
||||
my_flag_autorize_msc_transfert = false;
|
||||
}
|
||||
|
||||
void task(void)
|
||||
{
|
||||
void task(void) {
|
||||
udi_msc_process_trans();
|
||||
}
|
||||
\endcode
|
||||
|
|
|
|||
|
|
@ -166,7 +166,6 @@ void otg_dual_disable(void);
|
|||
Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\
|
||||
Rd_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMVALUE_Msk))
|
||||
|
||||
|
||||
//! Get the dual-role device state of the internal USB finite state machine of the UOTGHS controller
|
||||
#define otg_get_fsm_drd_state() (Rd_bitfield(UOTGHS->UOTGHS_FSM, UOTGHS_FSM_DRDSTATE_Msk))
|
||||
#define Is_otg_a_suspend() (4==otg_get_fsm_drd_state())
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue