mirror of
https://github.com/MarlinFirmware/Marlin.git
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✨ BigTreeTech Kraken V1.0 (STM32H723ZG) (#26565)
Co-authored-by: bigtreetech <38851044+bigtreetech@users.noreply.github.com>
This commit is contained in:
Keith Bennett
GitHub
parent
06b9e40042
commit
c485f513d7
@ -482,6 +482,7 @@
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#define BOARD_BTT_OCTOPUS_MAX_EZ_V1_0 6008 // BigTreeTech Octopus Max EZ V1.0 (STM32H723ZE)
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#define BOARD_BTT_OCTOPUS_PRO_V1_0_1 6009 // BigTreeTech Octopus Pro v1.0.1 (STM32H723ZE)
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#define BOARD_BTT_OCTOPUS_PRO_V1_1 6010 // BigTreeTech Octopus Pro v1.1 (STM32H723ZE)
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#define BOARD_BTT_KRAKEN_V1_0 6011 // BigTreeTech Kraken v1.0 (STM32H723ZG)
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//
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// Espressif ESP32 WiFi
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@ -841,6 +841,8 @@
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#include "stm32h7/pins_BTT_OCTOPUS_PRO_V1_0_1.h" // STM32H7 env:STM32H723ZE_btt
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#elif MB(BTT_OCTOPUS_PRO_V1_1)
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#include "stm32h7/pins_BTT_OCTOPUS_PRO_V1_1.h" // STM32H7 env:STM32H723ZE_btt
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#elif MB(BTT_KRAKEN_V1_0)
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#include "stm32h7/pins_BTT_KRAKEN_V1_0.h" // STM32H7 env:STM32H723ZG_btt
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#elif MB(TEENSY41)
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#include "teensy4/pins_TEENSY41.h" // Teensy-4.x env:teensy41
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#elif MB(T41U5XBB)
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674
Marlin/src/pins/stm32h7/pins_BTT_KRAKEN_V1_0.h
Normal file
674
Marlin/src/pins/stm32h7/pins_BTT_KRAKEN_V1_0.h
Normal file
@ -0,0 +1,674 @@
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/**
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* Marlin 3D Printer Firmware
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* Copyright (c) 2023 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*
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*/
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#pragma once
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#include "env_validate.h"
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#define BOARD_INFO_NAME "BTT Kraken V1.0"
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#define BOARD_WEBSITE_URL "github.com/bigtreetech/BIGTREETECH-Kraken"
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#define USES_DIAG_JUMPERS
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//
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// EEPROM
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//
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#if ANY(NO_EEPROM_SELECTED, FLASH_EEPROM_EMULATION)
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#undef NO_EEPROM_SELECTED
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#ifndef FLASH_EEPROM_EMULATION
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#define FLASH_EEPROM_EMULATION
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#endif
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#define EEPROM_PAGE_SIZE (0x800UL) // 2K
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#define EEPROM_START_ADDRESS (0x8000000UL + (STM32_FLASH_SIZE) * 1024UL - (EEPROM_PAGE_SIZE) * 2UL)
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#define MARLIN_EEPROM_SIZE EEPROM_PAGE_SIZE
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#endif
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// Avoid conflict with TIMER_TONE
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#define STEP_TIMER 8
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//
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// Servos
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//
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#define SERVO0_PIN PE9 // PROBE
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#define SERVO1_PIN PE7 // MOTOR
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//
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// Trinamic Stallguard pins
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//
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#define X_DIAG_PIN PC15 // MIN1
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#define Y_DIAG_PIN PF0 // MIN2
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#define Z_DIAG_PIN PF1 // MIN3
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#define E0_DIAG_PIN PF2 // MIN4
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#define E1_DIAG_PIN PF3 // MIN5
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#define E2_DIAG_PIN PF4 // MIN6
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#define E3_DIAG_PIN PF10 // MIN7
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#define E4_DIAG_PIN PC0 // MIN8
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//
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// Limit Switches
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//
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#ifdef X_STALL_SENSITIVITY
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#define X_STOP_PIN X_DIAG_PIN
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#if X_HOME_TO_MIN
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#define X_MAX_PIN E0_DIAG_PIN // MIN4
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#else
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#define X_MIN_PIN E0_DIAG_PIN // MIN4
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#endif
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#elif NEEDS_X_MINMAX
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#ifndef X_MIN_PIN
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#define X_MIN_PIN X_DIAG_PIN // MIN1
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#endif
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#ifndef X_MAX_PIN
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#define X_MAX_PIN E0_DIAG_PIN // MIN4
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#endif
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#else
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#define X_STOP_PIN X_DIAG_PIN // MIN1
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#endif
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#ifdef Y_STALL_SENSITIVITY
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#define Y_STOP_PIN Y_DIAG_PIN
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#if Y_HOME_TO_MIN
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#define Y_MAX_PIN E1_DIAG_PIN // MIN5
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#else
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#define Y_MIN_PIN E1_DIAG_PIN // MIN5
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#endif
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#elif NEEDS_Y_MINMAX
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#ifndef Y_MIN_PIN
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#define Y_MIN_PIN Y_DIAG_PIN // MIN2
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#endif
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#ifndef Y_MAX_PIN
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#define Y_MAX_PIN E1_DIAG_PIN // MIN5
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#endif
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#else
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#define Y_STOP_PIN Y_DIAG_PIN // MIN2
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#endif
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#ifdef Z_STALL_SENSITIVITY
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#define Z_STOP_PIN Z_DIAG_PIN
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#if Z_HOME_TO_MIN
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#define Z_MAX_PIN E2_DIAG_PIN // MIN6
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#else
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#define Z_MIN_PIN E2_DIAG_PIN // MIN6
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#endif
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#elif NEEDS_Z_MINMAX
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#ifndef Z_MIN_PIN
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#define Z_MIN_PIN Z_DIAG_PIN // MIN3
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#endif
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#ifndef Z_MAX_PIN
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#define Z_MAX_PIN E2_DIAG_PIN // MIN6
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#endif
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#else
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#define Z_STOP_PIN Z_DIAG_PIN // MIN3
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#endif
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//
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// Z Probe (when not Z_MIN_PIN)
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//
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#ifndef Z_MIN_PROBE_PIN
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#define Z_MIN_PROBE_PIN PG1 // PROBE (BLTouch, MicroProbe, etc.)
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//#define Z_MIN_PROBE_PIN PD11 // IND-DET (Inductive probe)
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#endif
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//
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// Probe enable
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//
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#if ENABLED(PROBE_ENABLE_DISABLE) && !defined(PROBE_ENABLE_PIN)
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#define PROBE_ENABLE_PIN SERVO0_PIN
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#endif
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//
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// Filament Runout Sensor
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//
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#define FIL_RUNOUT_PIN E0_DIAG_PIN // MIN4
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#define FIL_RUNOUT2_PIN E1_DIAG_PIN // MIN5
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#define FIL_RUNOUT3_PIN E2_DIAG_PIN // MIN6
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#define FIL_RUNOUT4_PIN E3_DIAG_PIN // MIN7
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#define FIL_RUNOUT5_PIN E4_DIAG_PIN // MIN8
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//
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// Steppers
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//
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#define X_STEP_PIN PC14 // S1 (Motor 1)
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#define X_DIR_PIN PC13
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#define X_ENABLE_PIN PE6
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#ifndef X_CS_PIN
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#define X_CS_PIN PD6
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#endif
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#define Y_STEP_PIN PE5 // S2 (Motor 2)
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#define Y_DIR_PIN PE4
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#define Y_ENABLE_PIN PE3
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#ifndef Y_CS_PIN
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#define Y_CS_PIN PD5
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#endif
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#define Z_STEP_PIN PE2 // S3 (Motor 3)
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#define Z_DIR_PIN PE1
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#define Z_ENABLE_PIN PE0
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#ifndef Z_CS_PIN
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#define Z_CS_PIN PD4
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#endif
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#define E0_STEP_PIN PB9 // S4 (Motor 4)
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#define E0_DIR_PIN PB8
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#define E0_ENABLE_PIN PB7
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#ifndef E0_CS_PIN
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#define E0_CS_PIN PD3
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#endif
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#define E1_STEP_PIN PG9 // S5 (Motor 5)
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#define E1_DIR_PIN PG10
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#define E1_ENABLE_PIN PG13
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#ifndef E1_CS_PIN
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#define E1_CS_PIN PD2
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#endif
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#define E2_STEP_PIN PG11 // S6 (Motor 6)
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#define E2_DIR_PIN PD7
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#define E2_ENABLE_PIN PG12
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#ifndef E2_CS_PIN
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#define E2_CS_PIN PA15
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#endif
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#define E3_STEP_PIN PB4 // S7 (Motor 7)
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#define E3_DIR_PIN PB3
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#define E3_ENABLE_PIN PB5
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#ifndef E3_CS_PIN
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#define E3_CS_PIN PA9
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#endif
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#define E4_STEP_PIN PG15 // S8 (Motor 8)
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#define E4_DIR_PIN PB6
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#define E4_ENABLE_PIN PG14
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#ifndef E4_CS_PIN
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#define E4_CS_PIN PA10
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#endif
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//
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// Integrated TMC2160 driver defaults
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//
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#if (HAS_X_AXIS && !AXIS_DRIVER_TYPE_X(TMC2160)) \
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|| (HAS_Y_AXIS && !AXIS_DRIVER_TYPE_Y(TMC2160)) \
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|| (NUM_Z_STEPPERS >= 1 && !AXIS_DRIVER_TYPE_Z(TMC2160)) \
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|| (NUM_Z_STEPPERS >= 2 && !AXIS_DRIVER_TYPE_Z2(TMC2160)) \
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|| (NUM_Z_STEPPERS >= 3 && !AXIS_DRIVER_TYPE_Z3(TMC2160)) \
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|| (NUM_Z_STEPPERS >= 4 && !AXIS_DRIVER_TYPE_Z4(TMC2160)) \
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|| (EXTRUDERS >= 1 && !AXIS_DRIVER_TYPE_E0(TMC2160)) \
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|| (EXTRUDERS >= 2 && !AXIS_DRIVER_TYPE_E1(TMC2160)) \
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|| (EXTRUDERS >= 3 && !AXIS_DRIVER_TYPE_E2(TMC2160)) \
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|| (EXTRUDERS >= 4 && !AXIS_DRIVER_TYPE_E3(TMC2160)) \
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|| (EXTRUDERS >= 5 && !AXIS_DRIVER_TYPE_E4(TMC2160))
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#error "All DRIVER TYPEs must be TMC2160 for BOARD_BTT_KRAKEN_V1_0."
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#endif
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// RSENSE defaults
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#if HAS_X_AXIS
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static_assert(X_RSENSE == 0.022, "X_RSENSE (S1 / Motor 1) must be 0.022 for BOARD_BTT_KRAKEN_V1_0.");
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#endif
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#if HAS_Y_AXIS
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static_assert(Y_RSENSE == 0.022, "Y_RSENSE (S2 / Motor 2) must be 0.022 for BOARD_BTT_KRAKEN_V1_0.");
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#endif
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#if NUM_Z_STEPPERS >= 1
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static_assert(Z_RSENSE == 0.022, "Z_RSENSE (S3 / Motor 3) must be 0.022 for BOARD_BTT_KRAKEN_V1_0.");
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#endif
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#if NUM_Z_STEPPERS >= 2
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static_assert(Z2_RSENSE == 0.075, "Z2_RSENSE (S5 / Motor 5) must be 0.075 for BOARD_BTT_KRAKEN_V1_0.");
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#endif
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#if NUM_Z_STEPPERS >= 3
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static_assert(Z3_RSENSE == 0.075, "Z3_RSENSE (S6 / Motor 6) must be 0.075 for BOARD_BTT_KRAKEN_V1_0.");
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#endif
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#if NUM_Z_STEPPERS >= 4
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static_assert(Z4_RSENSE == 0.075, "Z4_RSENSE (S7 / Motor 7) must be 0.075 for BOARD_BTT_KRAKEN_V1_0.");
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#endif
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#if EXTRUDERS >= 1
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static_assert(E0_RSENSE == 0.022, "E0_RSENSE (S4 / Motor 4) must be 0.022 for BOARD_BTT_KRAKEN_V1_0.");
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#endif
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#if EXTRUDERS >= 2
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static_assert(E1_RSENSE == 0.075, "E1_RSENSE (S5 / Motor 5) must be 0.075 for BOARD_BTT_KRAKEN_V1_0.");
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#endif
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#if EXTRUDERS >= 3
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static_assert(E2_RSENSE == 0.075, "E2_RSENSE (S6 / Motor 6) must be 0.075 for BOARD_BTT_KRAKEN_V1_0.");
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#endif
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#if EXTRUDERS >= 4
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static_assert(E3_RSENSE == 0.075, "E3_RSENSE (S7 / Motor 7) must be 0.075 for BOARD_BTT_KRAKEN_V1_0.");
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#endif
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#if EXTRUDERS >= 5
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static_assert(E4_RSENSE == 0.075, "E4_RSENSE (S8 / Motor 8) must be 0.075 for BOARD_BTT_KRAKEN_V1_0.");
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#endif
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//
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// Temperature Sensors
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//
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#define TEMP_0_PIN PB1 // TH0
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#define TEMP_1_PIN PC5 // TH1
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#define TEMP_2_PIN PC4 // TH2
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#define TEMP_3_PIN PA7 // TH3
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#define TEMP_BED_PIN PB0 // THB
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#if TEMP_SENSOR_0_IS_MAX31865
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#define TEMP_0_CS_PIN PC9 // 31865 (1)
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#define TEMP_0_SCK_PIN PC10
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#define TEMP_0_MISO_PIN PC11
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#define TEMP_0_MOSI_PIN PC12
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#define SOFTWARE_SPI // MAX31865 and LCD SD share a set of SPIs, Set SD to software SPI
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#define FORCE_SOFT_SPI
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#endif
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#if TEMP_SENSOR_1_IS_MAX31865
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#define TEMP_1_CS_PIN PA8 // 31865 (2)
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#define TEMP_1_SCK_PIN PC10
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#define TEMP_1_MISO_PIN PC11
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#define TEMP_1_MOSI_PIN PC12
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#endif
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//
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// Heaters / Fans
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//
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#define HEATER_BED_PIN PF5 // BED-OUT
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#define HEATER_0_PIN PF6 // HE0
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#define HEATER_1_PIN PF7 // HE1
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#define HEATER_2_PIN PF9 // HE2
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#define HEATER_3_PIN PF8 // HE3
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#define FAN0_PIN PA0 // FAN0 (3 wire)
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#define FAN1_PIN PA1 // FAN1 (3 wire)
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#define FAN2_PIN PA2 // FAN2 (3 wire)
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#define FAN3_PIN PA3 // FAN3 (3 wire)
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#define FAN4_PIN PA4 // FAN4 (3 wire)
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#define FAN5_PIN PA5 // FAN5 (3 wire)
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#define FAN6_PIN PA6 // FAN6 (4 wire)
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#define FAN7_PIN PE8 // FAN7 (4 wire)
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#ifndef E0_FAN_TACHO_PIN
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//#define E0_FAN_TACHO_PIN PC1 // FAN6
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#endif
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#ifndef E1_FAN_TACHO_PIN
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//#define E1_FAN_TACHO_PIN PG0 // FAN7
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#endif
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//
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// Power Supply Control
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//
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#ifndef PS_ON_PIN
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#define PS_ON_PIN PD10 // PS-ON
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#endif
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//
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// Misc. Functions
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//
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#define LED_PIN PA14
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#ifndef FILWIDTH_PIN
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#define FILWIDTH_PIN PC2
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#endif
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#ifndef FILWIDTH2_PIN
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#define FILWIDTH2_PIN PC3
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#endif
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//
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// SD Support
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//
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#ifndef SDCARD_CONNECTION
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#if HAS_WIRED_LCD
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#define SDCARD_CONNECTION LCD
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#else
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#define SDCARD_CONNECTION ONBOARD
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#endif
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#endif
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//
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// Default pins for TMC software SPI
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// This board only supports SW SPI for stepper drivers
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//
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#if HAS_TMC_SPI
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#define TMC_USE_SW_SPI
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#ifndef TMC_SPI_MOSI
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#define TMC_SPI_MOSI PC8
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#endif
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#ifndef TMC_SPI_MISO
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#define TMC_SPI_MISO PC7
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#endif
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#ifndef TMC_SPI_SCK
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#define TMC_SPI_SCK PC6
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#endif
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#endif
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/** ------ ------
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* (BEEPER) PG5 | 1 2 | PG4 (BTN_ENC) (MISO) PE13 | 1 2 | PE12 (SCK)
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* (LCD_EN) PG3 | 3 4 | PG2 (LCD_RS) (BTN_EN1) PG8 | 3 4 | PE11 (SD_SS)
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* (LCD_D4) PD15 5 6 | PD14 (LCD_D5) (BTN_EN2) PG7 5 6 | PE14 (MOSI)
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* (LCD_D6) PD13 | 7 8 | PD12 (LCD_D7) (SD_DETECT) PG6 | 7 8 | RESET
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* GND | 9 10 | 5V GND | 9 10 | --
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* ------ ------
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* EXP1 EXP2
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*/
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#define EXP1_01_PIN PG5
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#define EXP1_02_PIN PG4
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#define EXP1_03_PIN PG3
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#define EXP1_04_PIN PG2
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#define EXP1_05_PIN PD15
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#define EXP1_06_PIN PD14
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#define EXP1_07_PIN PD13
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#define EXP1_08_PIN PD12
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#define EXP2_01_PIN PE13
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#define EXP2_02_PIN PE12
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#define EXP2_03_PIN PG8
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#define EXP2_04_PIN PE11
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#define EXP2_05_PIN PG7
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#define EXP2_06_PIN PE14
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#define EXP2_07_PIN PG6
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#define EXP2_08_PIN -1
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//
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// Onboard SD card
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// Must use soft SPI because Marlin's default hardware SPI is tied to LCD's EXP2
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//
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#if SD_CONNECTION_IS(ONBOARD)
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#ifndef SD_DETECT_STATE
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#define SD_DETECT_STATE HIGH
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#elif SD_DETECT_STATE == LOW
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#error "BOARD_BTT_KRAKEN_V1_0 onboard SD requires SD_DETECT_STATE set to HIGH."
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#endif
|
||||
#define SDSS PB12
|
||||
#define SD_SS_PIN SDSS
|
||||
#define SD_SCK_PIN PB13
|
||||
#define SD_MISO_PIN PB14
|
||||
#define SD_MOSI_PIN PB15
|
||||
#define SD_DETECT_PIN PE15
|
||||
#define SOFTWARE_SPI
|
||||
#elif SD_CONNECTION_IS(LCD)
|
||||
#define SDSS EXP2_04_PIN
|
||||
#define SD_SS_PIN SDSS
|
||||
#define SD_SCK_PIN EXP2_02_PIN
|
||||
#define SD_MISO_PIN EXP2_01_PIN
|
||||
#define SD_MOSI_PIN EXP2_06_PIN
|
||||
#define SD_DETECT_PIN EXP2_07_PIN
|
||||
#define SOFTWARE_SPI
|
||||
#elif SD_CONNECTION_IS(CUSTOM_CABLE)
|
||||
#error "CUSTOM_CABLE is not a supported SDCARD_CONNECTION for BOARD_BTT_KRAKEN_V1_0."
|
||||
#endif
|
||||
|
||||
#if ENABLED(BTT_MOTOR_EXPANSION)
|
||||
/**
|
||||
* ------ ------
|
||||
* M3DIAG | 1 2 | M3RX M3STP | 1 2 | M3DIR
|
||||
* M2DIAG | 3 4 | M2RX M2STP | 3 4 | M2DIR
|
||||
* M1DIAG 5 6 | M1RX M1DIR 5 6 | M1STP
|
||||
* M3EN | 7 8 | M2EN M1EN | 7 8 | --
|
||||
* GND | 9 10 | -- GND | 9 10 | --
|
||||
* ------ ------
|
||||
* EXP1 EXP2
|
||||
*/
|
||||
|
||||
// M1 on Driver Expansion Module
|
||||
#define E4_STEP_PIN EXP2_06_PIN
|
||||
#define E4_DIR_PIN EXP2_05_PIN
|
||||
#define E4_ENABLE_PIN EXP2_07_PIN
|
||||
#define E4_DIAG_PIN EXP1_05_PIN
|
||||
#define E4_CS_PIN EXP1_06_PIN
|
||||
#if HAS_TMC_UART
|
||||
#define E4_SERIAL_TX_PIN EXP1_06_PIN
|
||||
#define E4_SERIAL_RX_PIN E4_SERIAL_TX_PIN
|
||||
#endif
|
||||
|
||||
// M2 on Driver Expansion Module
|
||||
#define E5_STEP_PIN EXP2_03_PIN
|
||||
#define E5_DIR_PIN EXP2_04_PIN
|
||||
#define E5_ENABLE_PIN EXP1_08_PIN
|
||||
#define E5_DIAG_PIN EXP1_03_PIN
|
||||
#define E5_CS_PIN EXP1_04_PIN
|
||||
#if HAS_TMC_UART
|
||||
#define E5_SERIAL_TX_PIN EXP1_04_PIN
|
||||
#define E5_SERIAL_RX_PIN E5_SERIAL_TX_PIN
|
||||
#endif
|
||||
|
||||
// M3 on Driver Expansion Module
|
||||
#define E6_STEP_PIN EXP2_01_PIN
|
||||
#define E6_DIR_PIN EXP2_02_PIN
|
||||
#define E6_ENABLE_PIN EXP1_07_PIN
|
||||
#define E6_DIAG_PIN EXP1_01_PIN
|
||||
#define E6_CS_PIN EXP1_02_PIN
|
||||
#if HAS_TMC_UART
|
||||
#define E6_SERIAL_TX_PIN EXP1_02_PIN
|
||||
#define E6_SERIAL_RX_PIN E6_SERIAL_TX_PIN
|
||||
#endif
|
||||
|
||||
#endif // BTT_MOTOR_EXPANSION
|
||||
|
||||
//
|
||||
// LCDs and Controllers
|
||||
//
|
||||
#if IS_TFTGLCD_PANEL
|
||||
|
||||
#if ENABLED(TFTGLCD_PANEL_SPI)
|
||||
#define TFTGLCD_CS EXP2_03_PIN
|
||||
#endif
|
||||
|
||||
#elif HAS_DWIN_E3V2 || IS_DWIN_MARLINUI
|
||||
/**
|
||||
* ------ ------ ---
|
||||
* | 1 2 | | 1 2 | 1 |
|
||||
* | 3 4 | RX | 3 4 | TX | 2 | RX
|
||||
* ENT 5 6 | BEEP ENT 5 6 | BEEP | 3 | TX
|
||||
* B | 7 8 | A B | 7 8 | A | 4 |
|
||||
* GND | 9 10 | VCC GND | 9 10 | VCC 5 |
|
||||
* ------ ------ ---
|
||||
* EXP1 DWIN TFT
|
||||
*
|
||||
* DWIN pins are labeled as printed on DWIN PCB. GND, VCC, A, B, ENT & BEEP can be connected in the same
|
||||
* orientation as the existing plug/DWIN to EXP1. TX/RX need to be connected to the TFT port, with TX->RX, RX->TX.
|
||||
*/
|
||||
|
||||
#ifndef NO_CONTROLLER_CUSTOM_WIRING_WARNING
|
||||
#error "CAUTION! Ender-3 V2 display requires a custom cable. See 'pins_BTT_OCTOPUS_V1_common.h' for details. (Define NO_CONTROLLER_CUSTOM_WIRING_WARNING to suppress this warning.)"
|
||||
#endif
|
||||
|
||||
#define BEEPER_PIN EXP1_06_PIN
|
||||
#define BTN_EN1 EXP1_08_PIN
|
||||
#define BTN_EN2 EXP1_07_PIN
|
||||
#define BTN_ENC EXP1_05_PIN
|
||||
|
||||
#elif HAS_WIRED_LCD
|
||||
|
||||
#define BEEPER_PIN EXP1_01_PIN
|
||||
#define BTN_ENC EXP1_02_PIN
|
||||
|
||||
#if ENABLED(CR10_STOCKDISPLAY)
|
||||
|
||||
#define LCD_PINS_RS EXP1_07_PIN
|
||||
|
||||
#define BTN_EN1 EXP1_03_PIN
|
||||
#define BTN_EN2 EXP1_05_PIN
|
||||
|
||||
#define LCD_PINS_EN EXP1_08_PIN
|
||||
#define LCD_PINS_D4 EXP1_06_PIN
|
||||
|
||||
#else
|
||||
|
||||
#define LCD_PINS_RS EXP1_04_PIN
|
||||
|
||||
#define BTN_EN1 EXP2_03_PIN
|
||||
#define BTN_EN2 EXP2_05_PIN
|
||||
|
||||
#define LCD_PINS_EN EXP1_03_PIN
|
||||
#define LCD_PINS_D4 EXP1_05_PIN
|
||||
|
||||
#if ENABLED(FYSETC_MINI_12864)
|
||||
#define DOGLCD_CS EXP1_03_PIN
|
||||
#define DOGLCD_A0 EXP1_04_PIN
|
||||
//#define LCD_BACKLIGHT_PIN -1
|
||||
#define LCD_RESET_PIN EXP1_05_PIN // Must be high or open for LCD to operate normally.
|
||||
#if ANY(FYSETC_MINI_12864_1_2, FYSETC_MINI_12864_2_0)
|
||||
#ifndef RGB_LED_R_PIN
|
||||
#define RGB_LED_R_PIN EXP1_06_PIN
|
||||
#endif
|
||||
#ifndef RGB_LED_G_PIN
|
||||
#define RGB_LED_G_PIN EXP1_07_PIN
|
||||
#endif
|
||||
#ifndef RGB_LED_B_PIN
|
||||
#define RGB_LED_B_PIN EXP1_08_PIN
|
||||
#endif
|
||||
#elif ENABLED(FYSETC_MINI_12864_2_1)
|
||||
#define NEOPIXEL_PIN EXP1_06_PIN
|
||||
#endif
|
||||
#endif // !FYSETC_MINI_12864
|
||||
|
||||
#if IS_ULTIPANEL
|
||||
#define LCD_PINS_D5 EXP1_06_PIN
|
||||
#define LCD_PINS_D6 EXP1_07_PIN
|
||||
#define LCD_PINS_D7 EXP1_08_PIN
|
||||
|
||||
#if ENABLED(REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER)
|
||||
#define BTN_ENC_EN LCD_PINS_D7 // Detect the presence of the encoder
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif // HAS_WIRED_LCD
|
||||
|
||||
// Alter timing for graphical display
|
||||
#if IS_U8GLIB_ST7920
|
||||
#define BOARD_ST7920_DELAY_1 120
|
||||
#define BOARD_ST7920_DELAY_2 80
|
||||
#define BOARD_ST7920_DELAY_3 580
|
||||
#endif
|
||||
|
||||
#if HAS_SPI_TFT // Config for Classic UI (emulated DOGM) and Color UI
|
||||
|
||||
#define TFT_SCK_PIN EXP2_02_PIN
|
||||
#define TFT_MISO_PIN EXP2_01_PIN
|
||||
#define TFT_MOSI_PIN EXP2_06_PIN
|
||||
|
||||
#define BTN_EN1 EXP2_03_PIN
|
||||
#define BTN_EN2 EXP2_05_PIN
|
||||
|
||||
#ifndef TFT_WIDTH
|
||||
#define TFT_WIDTH 480
|
||||
#endif
|
||||
#ifndef TFT_HEIGHT
|
||||
#define TFT_HEIGHT 320
|
||||
#endif
|
||||
|
||||
#if ENABLED(BTT_TFT35_SPI_V1_0)
|
||||
|
||||
/**
|
||||
* ------ ------
|
||||
* BEEPER | 1 2 | LCD-BTN MISO | 1 2 | CLK
|
||||
* T_MOSI | 3 4 | T_CS LCD-ENCA | 3 4 | TFTCS
|
||||
* T_CLK | 5 6 T_MISO LCD-ENCB | 5 6 MOSI
|
||||
* PENIRQ | 7 8 | F_CS RS | 7 8 | RESET
|
||||
* GND | 9 10 | VCC GND | 9 10 | NC
|
||||
* ------ ------
|
||||
* EXP1 EXP2
|
||||
*
|
||||
* 480x320, 3.5", SPI Display with Rotary Encoder.
|
||||
* Stock Display for the BIQU B1 SE Series.
|
||||
* Schematic: https://github.com/bigtreetech/TFT35-SPI/blob/master/v1/Hardware/BTT%20TFT35-SPI%20V1-SCH.pdf
|
||||
*/
|
||||
#define TFT_CS_PIN EXP2_04_PIN
|
||||
#define TFT_DC_PIN EXP2_07_PIN
|
||||
#define TFT_A0_PIN TFT_DC_PIN
|
||||
|
||||
#define TOUCH_CS_PIN EXP1_04_PIN
|
||||
#define TOUCH_SCK_PIN EXP1_05_PIN
|
||||
#define TOUCH_MISO_PIN EXP1_06_PIN
|
||||
#define TOUCH_MOSI_PIN EXP1_03_PIN
|
||||
#define TOUCH_INT_PIN EXP1_07_PIN
|
||||
|
||||
#ifndef TOUCH_CALIBRATION_X
|
||||
#define TOUCH_CALIBRATION_X 17540
|
||||
#endif
|
||||
#ifndef TOUCH_CALIBRATION_Y
|
||||
#define TOUCH_CALIBRATION_Y -11388
|
||||
#endif
|
||||
#ifndef TOUCH_OFFSET_X
|
||||
#define TOUCH_OFFSET_X -21
|
||||
#endif
|
||||
#ifndef TOUCH_OFFSET_Y
|
||||
#define TOUCH_OFFSET_Y 337
|
||||
#endif
|
||||
#ifndef TOUCH_ORIENTATION
|
||||
#define TOUCH_ORIENTATION TOUCH_LANDSCAPE
|
||||
#endif
|
||||
|
||||
#elif ENABLED(MKS_TS35_V2_0)
|
||||
|
||||
/** ------ ------
|
||||
* BEEPER | 1 2 | BTN_ENC SPI1_MISO | 1 2 | SPI1_SCK
|
||||
* TFT_BKL / LCD_EN | 3 4 | TFT_RESET / LCD_RS BTN_EN1 | 3 4 | SPI1_CS
|
||||
* TOUCH_CS / LCD_D4 | 5 6 TOUCH_INT / LCD_D5 BTN_EN2 | 5 6 SPI1_MOSI
|
||||
* SPI1_CS / LCD_D6 | 7 8 | SPI1_RS / LCD_D7 SPI1_RS | 7 8 | RESET
|
||||
* GND | 9 10 | VCC GND | 9 10 | VCC
|
||||
* ------ ------
|
||||
* EXP1 EXP2
|
||||
*/
|
||||
#define TFT_CS_PIN EXP1_07_PIN // SPI1_CS
|
||||
#define TFT_DC_PIN EXP1_08_PIN // SPI1_RS
|
||||
#define TFT_A0_PIN TFT_DC_PIN
|
||||
|
||||
#define TFT_RESET_PIN EXP1_04_PIN
|
||||
|
||||
#define LCD_BACKLIGHT_PIN EXP1_03_PIN
|
||||
#define TFT_BACKLIGHT_PIN LCD_BACKLIGHT_PIN
|
||||
|
||||
#define TOUCH_BUTTONS_HW_SPI
|
||||
#define TOUCH_BUTTONS_HW_SPI_DEVICE 1
|
||||
|
||||
#define TOUCH_CS_PIN EXP1_05_PIN // SPI1_NSS
|
||||
#define TOUCH_SCK_PIN EXP2_02_PIN // SPI1_SCK
|
||||
#define TOUCH_MISO_PIN EXP2_01_PIN // SPI1_MISO
|
||||
#define TOUCH_MOSI_PIN EXP2_06_PIN // SPI1_MOSI
|
||||
|
||||
#define LCD_READ_ID 0xD3
|
||||
#define LCD_USE_DMA_SPI
|
||||
|
||||
#define TFT_BUFFER_WORDS 14400
|
||||
|
||||
#ifndef TOUCH_CALIBRATION_X
|
||||
#define TOUCH_CALIBRATION_X -17253
|
||||
#endif
|
||||
#ifndef TOUCH_CALIBRATION_Y
|
||||
#define TOUCH_CALIBRATION_Y 11579
|
||||
#endif
|
||||
#ifndef TOUCH_OFFSET_X
|
||||
#define TOUCH_OFFSET_X 514
|
||||
#endif
|
||||
#ifndef TOUCH_OFFSET_Y
|
||||
#define TOUCH_OFFSET_Y -24
|
||||
#endif
|
||||
#ifndef TOUCH_ORIENTATION
|
||||
#define TOUCH_ORIENTATION TOUCH_LANDSCAPE
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
//
|
||||
// NeoPixel LED
|
||||
//
|
||||
#if DISABLED(FYSETC_MINI_12864_2_1) && !defined(NEOPIXEL_PIN)
|
||||
#define NEOPIXEL_PIN PF12 // RGB1
|
||||
#endif
|
||||
#ifndef NEOPIXEL2_PIN
|
||||
#define NEOPIXEL2_PIN PF11 // RGB2
|
||||
#endif
|
||||
61
buildroot/share/PlatformIO/boards/marlin_STM32H723ZG.json
Normal file
61
buildroot/share/PlatformIO/boards/marlin_STM32H723ZG.json
Normal file
@ -0,0 +1,61 @@
|
||||
{
|
||||
"build": {
|
||||
"core": "stm32",
|
||||
"cpu": "cortex-m7",
|
||||
"extra_flags": "-DSTM32H7xx -DSTM32H723xx",
|
||||
"f_cpu": "550000000L",
|
||||
"mcu": "stm32h723zgt6",
|
||||
"product_line": "STM32H723xx",
|
||||
"variant": "MARLIN_H723ZG"
|
||||
},
|
||||
"connectivity": [
|
||||
"can",
|
||||
"ethernet"
|
||||
],
|
||||
"debug": {
|
||||
"jlink_device": "STM32H723ZG",
|
||||
"openocd_target": "stm32h7x",
|
||||
"svd_path": "STM32H7x3.svd",
|
||||
"tools": {
|
||||
"stlink": {
|
||||
"server": {
|
||||
"arguments": [
|
||||
"-f",
|
||||
"scripts/interface/stlink.cfg",
|
||||
"-c",
|
||||
"transport select hla_swd",
|
||||
"-f",
|
||||
"scripts/target/stm32h7x.cfg",
|
||||
"-c",
|
||||
"reset_config none"
|
||||
],
|
||||
"executable": "bin/openocd",
|
||||
"package": "tool-openocd"
|
||||
}
|
||||
}
|
||||
}
|
||||
},
|
||||
"frameworks": [
|
||||
"arduino",
|
||||
"stm32cube"
|
||||
],
|
||||
"name": "STM32H723ZG (564k RAM. 1024k Flash)",
|
||||
"upload": {
|
||||
"disable_flushing": false,
|
||||
"maximum_ram_size": 577536,
|
||||
"maximum_size": 1048576,
|
||||
"protocol": "stlink",
|
||||
"protocols": [
|
||||
"stlink",
|
||||
"dfu",
|
||||
"jlink",
|
||||
"cmsis-dap"
|
||||
],
|
||||
"offset_address": "0x8020000",
|
||||
"require_upload_port": true,
|
||||
"use_1200bps_touch": false,
|
||||
"wait_for_upload_port": false
|
||||
},
|
||||
"url": "https://www.st.com/en/microcontrollers-microprocessors/stm32h723zg.html",
|
||||
"vendor": "ST"
|
||||
}
|
||||
@ -0,0 +1,688 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2020-2021, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
/*
|
||||
* Automatically generated from STM32H723ZETx.xml, STM32H723ZGTx.xml
|
||||
* STM32H733ZGTx.xml
|
||||
* CubeMX DB release 6.0.30
|
||||
*/
|
||||
#if !defined(CUSTOM_PERIPHERAL_PINS)
|
||||
#include "Arduino.h"
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
/* =====
|
||||
* Notes:
|
||||
* - The pins mentioned Px_y_ALTz are alternative possibilities which use other
|
||||
* HW peripheral instances. You can use them the same way as any other "normal"
|
||||
* pin (i.e. analogWrite(PA7_ALT1, 128);).
|
||||
*
|
||||
* - Commented lines are alternative possibilities which are not used per default.
|
||||
* If you change them, you will have to know what you do
|
||||
* =====
|
||||
*/
|
||||
|
||||
//*** ADC ***
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_ADC[] = {
|
||||
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INP16
|
||||
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_INP17
|
||||
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_INP14
|
||||
{PA_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_INP14
|
||||
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_INP15
|
||||
{PA_3_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_INP15
|
||||
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INP18
|
||||
{PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INP18
|
||||
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC1_INP19
|
||||
{PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC2_INP19
|
||||
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INP3
|
||||
{PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INP3
|
||||
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7
|
||||
{PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7
|
||||
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9
|
||||
{PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9
|
||||
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5
|
||||
{PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5
|
||||
{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10
|
||||
{PC_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10
|
||||
{PC_0_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INP10
|
||||
{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11
|
||||
{PC_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11
|
||||
{PC_1_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11
|
||||
{PC_2_C, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_INP0
|
||||
{PC_3_C, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INP1
|
||||
{PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INP4
|
||||
{PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INP4
|
||||
{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_INP8
|
||||
{PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_INP8
|
||||
{PF_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_INP5
|
||||
{PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_INP9
|
||||
{PF_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_INP4
|
||||
{PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_INP8
|
||||
{PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_INP3
|
||||
{PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_INP7
|
||||
{PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_INP2
|
||||
{PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_INP6
|
||||
{PF_11, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_INP2
|
||||
{PF_12, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_INP6
|
||||
{PF_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_INP2
|
||||
{PF_14, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_INP6
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** DAC ***
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_DAC[] = {
|
||||
{PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1
|
||||
{PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** I2C ***
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_I2C_SDA[] = {
|
||||
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_9_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||
{PC_9_ALT1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PC_10, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)},
|
||||
{PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PF_0_ALT1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_I2C_SCL[] = {
|
||||
{PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||
{PA_8_ALT1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_8_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PC_11, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)},
|
||||
{PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PF_1_ALT1, I2C5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** TIM ***
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_TIM[] = {
|
||||
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PA_0_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
|
||||
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
||||
{PA_1_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
|
||||
{PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N
|
||||
{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
||||
{PA_2_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
|
||||
{PA_2_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
||||
{PA_3_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
|
||||
{PA_3_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2
|
||||
{PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
||||
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PA_6_ALT1, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
|
||||
{PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
||||
{PA_7_ALT3, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
|
||||
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
||||
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
||||
{PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
|
||||
{PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
||||
{PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
||||
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
|
||||
{PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||
{PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N
|
||||
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
||||
{PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N
|
||||
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
|
||||
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
|
||||
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
||||
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
||||
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
|
||||
{PB_14_ALT2, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1
|
||||
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
||||
{PB_15_ALT2, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2
|
||||
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
|
||||
{PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
|
||||
{PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
||||
{PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
|
||||
{PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
||||
{PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
|
||||
{PC_12, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||
{PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
||||
{PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PE_4, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N
|
||||
{PE_5, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PE_6, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2
|
||||
{PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
||||
{PF_0, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 1, 0)}, // TIM23_CH1
|
||||
{PF_1, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 2, 0)}, // TIM23_CH2
|
||||
{PF_2, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 3, 0)}, // TIM23_CH3
|
||||
{PF_3, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 4, 0)}, // TIM23_CH4
|
||||
{PF_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
|
||||
{PF_6_ALT1, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 1, 0)}, // TIM23_CH1
|
||||
{PF_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
|
||||
{PF_7_ALT1, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 2, 0)}, // TIM23_CH2
|
||||
{PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
|
||||
{PF_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N
|
||||
{PF_8_ALT2, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 3, 0)}, // TIM23_CH3
|
||||
{PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
|
||||
{PF_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N
|
||||
{PF_9_ALT2, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 4, 0)}, // TIM23_CH4
|
||||
{PF_11, TIM24, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM24, 1, 0)}, // TIM24_CH1
|
||||
{PF_12, TIM24, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM24, 2, 0)}, // TIM24_CH2
|
||||
{PF_13, TIM24, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM24, 3, 0)}, // TIM24_CH3
|
||||
{PF_14, TIM24, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM24, 4, 0)}, // TIM24_CH4
|
||||
{PG_12, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 1, 0)}, // TIM23_CH1
|
||||
{PG_13, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 2, 0)}, // TIM23_CH2
|
||||
{PG_14, TIM23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF13_TIM23, 3, 0)}, // TIM23_CH3
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** UART ***
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_TX[] = {
|
||||
{PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
|
||||
{PA_9_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PA_12, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)},
|
||||
{PA_15, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PB_4, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PB_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)},
|
||||
{PB_6_ALT1, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_6_ALT2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_13, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_14, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
|
||||
{PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_15, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_3, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_USART10)},
|
||||
{PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PF_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PG_1, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PG_12, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{PG_14, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_RX[] = {
|
||||
{PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
|
||||
{PA_10_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PA_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)},
|
||||
{PB_3, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)},
|
||||
{PB_7_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_8, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_15, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
|
||||
{PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_14, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_2, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PF_6, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PG_0, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PG_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PG_11, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_RTS[] = {
|
||||
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
|
||||
{PA_12_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_14_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_13, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PF_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PG_8, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PG_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PG_14, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_UART_CTS[] = {
|
||||
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
|
||||
{PA_11_ALT1, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_0, UART9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PF_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PG_13, USART10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{PG_13_ALT1, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PG_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** SPI ***
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_MOSI[] = {
|
||||
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_7_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
|
||||
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
|
||||
{PB_5_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_3_C, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)},
|
||||
{PD_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PF_9, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)},
|
||||
{PF_11, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)},
|
||||
{PG_14, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_MISO[] = {
|
||||
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_6_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PB_4_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_2_C, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PF_8, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)},
|
||||
{PG_9, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PG_12, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_SCLK[] = {
|
||||
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_5_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PA_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PB_3_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PC_12, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PF_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)},
|
||||
{PG_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PG_13, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SPI_SSEL[] = {
|
||||
{PA_0, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PA_4_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
|
||||
{PA_11, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||
{PA_15_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI6)},
|
||||
{PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)},
|
||||
{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||
{PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||
{PF_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)},
|
||||
{PG_8, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)},
|
||||
{PG_10, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** FDCAN ***
|
||||
|
||||
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_CAN_RD[] = {
|
||||
{PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_5, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PD_12, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_FDCAN3)},
|
||||
{PF_6, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_FDCAN3)},
|
||||
{PG_10, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_FDCAN3)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_CAN_TD[] = {
|
||||
{PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_6, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PD_13, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_FDCAN3)},
|
||||
{PF_7, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_FDCAN3)},
|
||||
{PG_9, FDCAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_FDCAN3)},
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** ETHERNET ***
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_Ethernet[] = {
|
||||
{PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS
|
||||
{PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK
|
||||
{PA_1_ALT1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_CLK
|
||||
{PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO
|
||||
{PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL
|
||||
{PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV
|
||||
{PA_7_ALT1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_DV
|
||||
{PA_9, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER
|
||||
{PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2
|
||||
{PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3
|
||||
{PB_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER
|
||||
{PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
|
||||
{PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
|
||||
{PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER
|
||||
{PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
|
||||
{PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
|
||||
{PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
|
||||
{PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC
|
||||
{PC_2_C, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2
|
||||
{PC_3_C, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK
|
||||
{PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0
|
||||
{PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1
|
||||
{PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
|
||||
{PG_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
|
||||
{PG_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
|
||||
{PG_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
|
||||
{PG_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
|
||||
{PG_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** OCTOSPI ***
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA0[] = {
|
||||
{PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PB_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PC_3_C, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PC_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PD_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PF_0, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO0
|
||||
{PF_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA1[] = {
|
||||
{PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PC_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PD_12, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PF_1, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO1
|
||||
{PF_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA2[] = {
|
||||
{PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PB_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PC_2_C, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PE_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PF_2, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO2
|
||||
{PF_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA3[] = {
|
||||
{PA_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PD_13, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PF_3, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO3
|
||||
{PF_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA4[] = {
|
||||
{PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4
|
||||
{PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4
|
||||
{PE_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4
|
||||
{PG_0, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO4
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA5[] = {
|
||||
{PC_2_C, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5
|
||||
{PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5
|
||||
{PE_8, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5
|
||||
{PG_1, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO5
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA6[] = {
|
||||
{PC_3_C, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PD_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PE_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PG_9, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PG_10, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO6
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_DATA7[] = {
|
||||
{PD_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7
|
||||
{PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7
|
||||
{PG_11, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO7
|
||||
{PG_14, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_SCLK[] = {
|
||||
{PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{PB_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{PF_4, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_CLK
|
||||
{PF_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef HAL_OSPI_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_OCTOSPI_SSEL[] = {
|
||||
{PB_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PE_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PG_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PG_12, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** USB ***
|
||||
|
||||
#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED)
|
||||
WEAK const PinMap PinMap_USB_OTG_HS[] = {
|
||||
#ifdef USE_USB_HS_IN_FS
|
||||
{PA_8, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_SOF
|
||||
{PA_9, USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
|
||||
{PA_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ID
|
||||
{PA_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, // USB_OTG_HS_DM
|
||||
{PA_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, // USB_OTG_HS_DP
|
||||
#else
|
||||
{PA_3, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D0
|
||||
{PA_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_CK
|
||||
{PB_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D1
|
||||
{PB_1, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D2
|
||||
{PB_5, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D7
|
||||
{PB_10, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D3
|
||||
{PB_11, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D4
|
||||
{PB_12, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D5
|
||||
{PB_13, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D6
|
||||
{PC_0, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_STP
|
||||
{PC_2_C, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_DIR
|
||||
{PC_3_C, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_NXT
|
||||
#endif /* USE_USB_HS_IN_FS */
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
//*** SD ***
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
WEAK const PinMap PinMap_SD[] = {
|
||||
{PA_0, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_SDMMC2)}, // SDMMC2_CMD
|
||||
{PB_3, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDMMC2)}, // SDMMC2_D2
|
||||
{PB_4, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDMMC2)}, // SDMMC2_D3
|
||||
{PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SDMMC1)}, // SDMMC1_CKIN
|
||||
{PB_8_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4
|
||||
{PB_8_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D4
|
||||
{PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SDMMC1)}, // SDMMC1_CDIR
|
||||
{PB_9_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5
|
||||
{PB_9_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D5
|
||||
{PB_13, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0
|
||||
{PB_14, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDMMC2)}, // SDMMC2_D0
|
||||
{PB_15, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDMMC2)}, // SDMMC2_D1
|
||||
{PC_1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_SDMMC2)}, // SDMMC2_CK
|
||||
{PC_4, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_SDMMC2)}, // SDMMC2_CKIN
|
||||
{PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR
|
||||
{PC_6_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6
|
||||
{PC_6_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D6
|
||||
{PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR
|
||||
{PC_7_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7
|
||||
{PC_7_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D7
|
||||
{PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0
|
||||
{PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1
|
||||
{PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2
|
||||
{PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3
|
||||
{PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CK
|
||||
{PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD
|
||||
{PD_6, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC2)}, // SDMMC2_CK
|
||||
{PD_7, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDMMC2)}, // SDMMC2_CMD
|
||||
{PG_9, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC2)}, // SDMMC2_D0
|
||||
{PG_10, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_SDMMC2)}, // SDMMC2_D1
|
||||
{PG_11, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D2
|
||||
{PG_12, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D3
|
||||
{PG_13, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D6
|
||||
{PG_14, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDMMC2)}, // SDMMC2_D7
|
||||
{NC, NP, 0}
|
||||
};
|
||||
#endif
|
||||
|
||||
#endif /* !CUSTOM_PERIPHERAL_PINS */
|
||||
117
buildroot/share/PlatformIO/variants/MARLIN_H723ZG/PinNamesVar.h
Normal file
117
buildroot/share/PlatformIO/variants/MARLIN_H723ZG/PinNamesVar.h
Normal file
@ -0,0 +1,117 @@
|
||||
/* Dual pad pin name */
|
||||
PC_2_C = PC_2 | PDUAL,
|
||||
PC_3_C = PC_3 | PDUAL,
|
||||
|
||||
/* Alternate pin name */
|
||||
PA_0_ALT1 = PA_0 | ALT1,
|
||||
PA_1_ALT1 = PA_1 | ALT1,
|
||||
PA_1_ALT2 = PA_1 | ALT2,
|
||||
PA_2_ALT1 = PA_2 | ALT1,
|
||||
PA_2_ALT2 = PA_2 | ALT2,
|
||||
PA_3_ALT1 = PA_3 | ALT1,
|
||||
PA_3_ALT2 = PA_3 | ALT2,
|
||||
PA_4_ALT1 = PA_4 | ALT1,
|
||||
PA_4_ALT2 = PA_4 | ALT2,
|
||||
PA_5_ALT1 = PA_5 | ALT1,
|
||||
PA_6_ALT1 = PA_6 | ALT1,
|
||||
PA_7_ALT1 = PA_7 | ALT1,
|
||||
PA_7_ALT2 = PA_7 | ALT2,
|
||||
PA_7_ALT3 = PA_7 | ALT3,
|
||||
PA_8_ALT1 = PA_8 | ALT1,
|
||||
PA_9_ALT1 = PA_9 | ALT1,
|
||||
PA_10_ALT1 = PA_10 | ALT1,
|
||||
PA_11_ALT1 = PA_11 | ALT1,
|
||||
PA_12_ALT1 = PA_12 | ALT1,
|
||||
PA_15_ALT1 = PA_15 | ALT1,
|
||||
PA_15_ALT2 = PA_15 | ALT2,
|
||||
PB_0_ALT1 = PB_0 | ALT1,
|
||||
PB_0_ALT2 = PB_0 | ALT2,
|
||||
PB_1_ALT1 = PB_1 | ALT1,
|
||||
PB_1_ALT2 = PB_1 | ALT2,
|
||||
PB_3_ALT1 = PB_3 | ALT1,
|
||||
PB_3_ALT2 = PB_3 | ALT2,
|
||||
PB_4_ALT1 = PB_4 | ALT1,
|
||||
PB_4_ALT2 = PB_4 | ALT2,
|
||||
PB_5_ALT1 = PB_5 | ALT1,
|
||||
PB_5_ALT2 = PB_5 | ALT2,
|
||||
PB_6_ALT1 = PB_6 | ALT1,
|
||||
PB_6_ALT2 = PB_6 | ALT2,
|
||||
PB_7_ALT1 = PB_7 | ALT1,
|
||||
PB_8_ALT1 = PB_8 | ALT1,
|
||||
PB_8_ALT2 = PB_8 | ALT2,
|
||||
PB_9_ALT1 = PB_9 | ALT1,
|
||||
PB_9_ALT2 = PB_9 | ALT2,
|
||||
PB_14_ALT1 = PB_14 | ALT1,
|
||||
PB_14_ALT2 = PB_14 | ALT2,
|
||||
PB_15_ALT1 = PB_15 | ALT1,
|
||||
PB_15_ALT2 = PB_15 | ALT2,
|
||||
PC_0_ALT1 = PC_0 | ALT1,
|
||||
PC_0_ALT2 = PC_0 | ALT2,
|
||||
PC_1_ALT1 = PC_1 | ALT1,
|
||||
PC_1_ALT2 = PC_1 | ALT2,
|
||||
PC_4_ALT1 = PC_4 | ALT1,
|
||||
PC_5_ALT1 = PC_5 | ALT1,
|
||||
PC_6_ALT1 = PC_6 | ALT1,
|
||||
PC_6_ALT2 = PC_6 | ALT2,
|
||||
PC_7_ALT1 = PC_7 | ALT1,
|
||||
PC_7_ALT2 = PC_7 | ALT2,
|
||||
PC_8_ALT1 = PC_8 | ALT1,
|
||||
PC_9_ALT1 = PC_9 | ALT1,
|
||||
PC_10_ALT1 = PC_10 | ALT1,
|
||||
PC_11_ALT1 = PC_11 | ALT1,
|
||||
PF_0_ALT1 = PF_0 | ALT1,
|
||||
PF_1_ALT1 = PF_1 | ALT1,
|
||||
PF_6_ALT1 = PF_6 | ALT1,
|
||||
PF_7_ALT1 = PF_7 | ALT1,
|
||||
PF_8_ALT1 = PF_8 | ALT1,
|
||||
PF_8_ALT2 = PF_8 | ALT2,
|
||||
PF_9_ALT1 = PF_9 | ALT1,
|
||||
PF_9_ALT2 = PF_9 | ALT2,
|
||||
PG_13_ALT1 = PG_13 | ALT1,
|
||||
|
||||
/* SYS_WKUP */
|
||||
#ifdef PWR_WAKEUP_PIN1
|
||||
SYS_WKUP1 = PA_0,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN2
|
||||
SYS_WKUP2 = PA_2,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN3
|
||||
SYS_WKUP3 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN4
|
||||
SYS_WKUP4 = PC_13,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN5
|
||||
SYS_WKUP5 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN6
|
||||
SYS_WKUP6 = PC_1,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN7
|
||||
SYS_WKUP7 = NC,
|
||||
#endif
|
||||
#ifdef PWR_WAKEUP_PIN8
|
||||
SYS_WKUP8 = NC,
|
||||
#endif
|
||||
|
||||
/* USB */
|
||||
#ifdef USBCON
|
||||
USB_OTG_HS_DM = PA_11,
|
||||
USB_OTG_HS_DP = PA_12,
|
||||
USB_OTG_HS_ID = PA_10,
|
||||
USB_OTG_HS_SOF = PA_8,
|
||||
USB_OTG_HS_ULPI_CK = PA_5,
|
||||
USB_OTG_HS_ULPI_D0 = PA_3,
|
||||
USB_OTG_HS_ULPI_D1 = PB_0,
|
||||
USB_OTG_HS_ULPI_D2 = PB_1,
|
||||
USB_OTG_HS_ULPI_D3 = PB_10,
|
||||
USB_OTG_HS_ULPI_D4 = PB_11,
|
||||
USB_OTG_HS_ULPI_D5 = PB_12,
|
||||
USB_OTG_HS_ULPI_D6 = PB_13,
|
||||
USB_OTG_HS_ULPI_D7 = PB_5,
|
||||
USB_OTG_HS_ULPI_DIR = PC_2_C,
|
||||
USB_OTG_HS_ULPI_NXT = PC_3_C,
|
||||
USB_OTG_HS_ULPI_STP = PC_0,
|
||||
USB_OTG_HS_VBUS = PA_9,
|
||||
#endif
|
||||
174
buildroot/share/PlatformIO/variants/MARLIN_H723ZG/ldscript.ld
Normal file
174
buildroot/share/PlatformIO/variants/MARLIN_H723ZG/ldscript.ld
Normal file
@ -0,0 +1,174 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** File : LinkerScript.ld
|
||||
**
|
||||
** Author : STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for STM32H7 series
|
||||
** 512Kbytes FLASH and 560Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is, without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
*****************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** Copyright (c) 2022 STMicroelectronics.
|
||||
** All rights reserved.
|
||||
**
|
||||
** This software is licensed under terms that can be found in the LICENSE file
|
||||
** in the root directory of this software component.
|
||||
** If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
**
|
||||
****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM_D1) + LENGTH(RAM_D1); /* end of RAM */
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x200 ; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400 ; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
|
||||
DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
|
||||
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
|
||||
RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 320K
|
||||
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 32K
|
||||
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 16K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
*(.RamFunc) /* .RamFunc sections */
|
||||
*(.RamFunc*) /* .RamFunc* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM_D1 AT> FLASH
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM_D1
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM_D1
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
@ -0,0 +1,317 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2020-2021, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
#if defined(STM32H723xx)
|
||||
#include "pins_arduino.h"
|
||||
|
||||
// Digital PinName array
|
||||
const PinName digitalPin[] = {
|
||||
PA_0, // D0/A0
|
||||
PA_1, // D1/A1
|
||||
PA_2, // D2/A2
|
||||
PA_3, // D3/A3
|
||||
PA_4, // D4/A4
|
||||
PA_5, // D5/A5
|
||||
PA_6, // D6/A6
|
||||
PA_7, // D7/A7
|
||||
PA_8, // D8
|
||||
PA_9, // D9
|
||||
PA_10, // D10
|
||||
PA_11, // D11
|
||||
PA_12, // D12
|
||||
PA_13, // D13
|
||||
PA_14, // D14
|
||||
PA_15, // D15
|
||||
PB_0, // D16/A8
|
||||
PB_1, // D17/A9
|
||||
PB_2, // D18
|
||||
PB_3, // D19
|
||||
PB_4, // D20
|
||||
PB_5, // D21
|
||||
PB_6, // D22
|
||||
PB_7, // D23
|
||||
PB_8, // D24
|
||||
PB_9, // D25
|
||||
PB_10, // D26
|
||||
PB_11, // D27
|
||||
PB_12, // D28
|
||||
PB_13, // D29
|
||||
PB_14, // D30
|
||||
PB_15, // D31
|
||||
PC_0, // D32/A10
|
||||
PC_1, // D33/A11
|
||||
PC_4, // D34/A12
|
||||
PC_5, // D35/A13
|
||||
PC_6, // D36
|
||||
PC_7, // D37
|
||||
PC_8, // D38
|
||||
PC_9, // D39
|
||||
PC_10, // D40
|
||||
PC_11, // D41
|
||||
PC_12, // D42
|
||||
PC_13, // D43
|
||||
PC_14, // D44
|
||||
PC_15, // D45
|
||||
PD_0, // D46
|
||||
PD_1, // D47
|
||||
PD_2, // D48
|
||||
PD_3, // D49
|
||||
PD_4, // D50
|
||||
PD_5, // D51
|
||||
PD_6, // D52
|
||||
PD_7, // D53
|
||||
PD_8, // D54
|
||||
PD_9, // D55
|
||||
PD_10, // D56
|
||||
PD_11, // D57
|
||||
PD_12, // D58
|
||||
PD_13, // D59
|
||||
PD_14, // D60
|
||||
PD_15, // D61
|
||||
PE_0, // D62
|
||||
PE_1, // D63
|
||||
PE_2, // D64
|
||||
PE_3, // D65
|
||||
PE_4, // D66
|
||||
PE_5, // D67
|
||||
PE_6, // D68
|
||||
PE_7, // D69
|
||||
PE_8, // D70
|
||||
PE_9, // D71
|
||||
PE_10, // D72
|
||||
PE_11, // D73
|
||||
PE_12, // D74
|
||||
PE_13, // D75
|
||||
PE_14, // D76
|
||||
PE_15, // D77
|
||||
PF_0, // D78
|
||||
PF_1, // D79
|
||||
PF_2, // D80
|
||||
PF_3, // D81/A14
|
||||
PF_4, // D82/A15
|
||||
PF_5, // D83/A16
|
||||
PF_6, // D84/A17
|
||||
PF_7, // D85/A18
|
||||
PF_8, // D86/A19
|
||||
PF_9, // D87/A20
|
||||
PF_10, // D88/A21
|
||||
PF_11, // D89/A22
|
||||
PF_12, // D90/A23
|
||||
PF_13, // D91/A24
|
||||
PF_14, // D92/A25
|
||||
PF_15, // D93
|
||||
PG_0, // D94
|
||||
PG_1, // D95
|
||||
PG_2, // D96
|
||||
PG_3, // D97
|
||||
PG_4, // D98
|
||||
PG_5, // D99
|
||||
PG_6, // D100
|
||||
PG_7, // D101
|
||||
PG_8, // D102
|
||||
PG_9, // D103
|
||||
PG_10, // D104
|
||||
PG_11, // D105
|
||||
PG_12, // D106
|
||||
PG_13, // D107
|
||||
PG_14, // D108
|
||||
PG_15, // D109
|
||||
PH_0, // D110
|
||||
PH_1, // D111
|
||||
PC_2_C, // D112/A26
|
||||
PC_3_C // D113/A27
|
||||
};
|
||||
|
||||
// Analog (Ax) pin number array
|
||||
const uint32_t analogInputPin[] = {
|
||||
0, // A0, PA0
|
||||
1, // A1, PA1
|
||||
2, // A2, PA2
|
||||
3, // A3, PA3
|
||||
4, // A4, PA4
|
||||
5, // A5, PA5
|
||||
6, // A6, PA6
|
||||
7, // A7, PA7
|
||||
16, // A8, PB0
|
||||
17, // A9, PB1
|
||||
32, // A10, PC0
|
||||
33, // A11, PC1
|
||||
34, // A12, PC4
|
||||
35, // A13, PC5
|
||||
81, // A14, PF3
|
||||
82, // A15, PF4
|
||||
83, // A16, PF5
|
||||
84, // A17, PF6
|
||||
85, // A18, PF7
|
||||
86, // A19, PF8
|
||||
87, // A20, PF9
|
||||
88, // A21, PF10
|
||||
89, // A22, PF11
|
||||
90, // A23, PF12
|
||||
91, // A24, PF13
|
||||
92, // A25, PF14
|
||||
112, // A26, PC2_C
|
||||
113 // A27, PC3_C
|
||||
};
|
||||
|
||||
void MPU_Config(void)
|
||||
{
|
||||
MPU_Region_InitTypeDef MPU_InitStruct = {0};
|
||||
|
||||
/* Disables the MPU */
|
||||
HAL_MPU_Disable();
|
||||
|
||||
/** Initializes and configures the Region and the memory to be protected
|
||||
*/
|
||||
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
|
||||
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
|
||||
MPU_InitStruct.BaseAddress = 0x0;
|
||||
MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
|
||||
MPU_InitStruct.SubRegionDisable = 0x87;
|
||||
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
|
||||
MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
|
||||
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
|
||||
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
|
||||
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
|
||||
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
|
||||
|
||||
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
||||
/* Enables the MPU */
|
||||
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief System Clock Configuration
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
WEAK void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
|
||||
|
||||
MPU_Config();
|
||||
|
||||
/** Supply configuration update enable
|
||||
*/
|
||||
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||
|
||||
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; // 48Mhz for USB
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 5; // 25Mhz / 5 = 5Mhz
|
||||
RCC_OscInitStruct.PLL.PLLN = 110; // 25Mhz / 5 * 110 = 550Mhz
|
||||
RCC_OscInitStruct.PLL.PLLP = 1; // 550Mhz / 1 = 550Mhz
|
||||
RCC_OscInitStruct.PLL.PLLQ = 10; // 550Mhz / 10 = 55Mhz
|
||||
RCC_OscInitStruct.PLL.PLLR = 10; // unused
|
||||
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
|
||||
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
|
||||
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|
||||
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
|
||||
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB
|
||||
| RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC
|
||||
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16
|
||||
| RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123
|
||||
| RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123
|
||||
| RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6;
|
||||
|
||||
/* HSI48 used for USB 48 Mhz */
|
||||
/* PLL1 qclk also used for FMC, SDMMC, RNG, SAI */
|
||||
/* PLL2 pclk is needed for adc max 80 Mhz (p,q,r same) */
|
||||
/* PLL2 pclk also used for LP timers 2,3,4,5, SPI 1,2,3 */
|
||||
/* PLL2 qclk is needed for uart, can, spi4,5,6 80 Mhz */
|
||||
/* PLL3 r clk is needed for i2c 80 Mhz (p,q,r same) */
|
||||
PeriphClkInitStruct.PLL2.PLL2M = 15; // M DIV 15 vco 25 / 15 ~ 1.667 Mhz
|
||||
PeriphClkInitStruct.PLL2.PLL2N = 96; // N MUL 96
|
||||
PeriphClkInitStruct.PLL2.PLL2P = 2; // P div 2
|
||||
PeriphClkInitStruct.PLL2.PLL2Q = 2; // Q div 2
|
||||
PeriphClkInitStruct.PLL2.PLL2R = 2; // R div 2
|
||||
// RCC_PLL1VCIRANGE_0 Clock range frequency between 1 and 2 MHz
|
||||
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_0;
|
||||
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
|
||||
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
|
||||
PeriphClkInitStruct.PLL3.PLL3M = 15; // M DIV 15 vco 25 / 15 ~ 1.667 Mhz
|
||||
PeriphClkInitStruct.PLL3.PLL3N = 96; // N MUL 96
|
||||
PeriphClkInitStruct.PLL3.PLL3P = 2; // P div 2
|
||||
PeriphClkInitStruct.PLL3.PLL3Q = 2; // Q div 2
|
||||
PeriphClkInitStruct.PLL3.PLL3R = 2; // R div 2
|
||||
// RCC_PLL1VCIRANGE_0 Clock range frequency between 1 and 2 MHz
|
||||
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_0;
|
||||
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOMEDIUM;
|
||||
PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
|
||||
// ADC from PLL2 pclk
|
||||
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
|
||||
// USB from HSI48
|
||||
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
|
||||
// SDMMC from PLL1 qclk
|
||||
PeriphClkInitStruct.SdmmcClockSelection = 0;
|
||||
//PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
|
||||
// LPUART from PLL2 qclk
|
||||
PeriphClkInitStruct.Lpuart1ClockSelection = 0;
|
||||
//PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2;
|
||||
// USART from PLL2 qclk
|
||||
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_PLL2;
|
||||
// USART from PLL2 qclk
|
||||
PeriphClkInitStruct.Usart234578ClockSelection = 0;
|
||||
//PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
|
||||
// I2C123 from PLL3 rclk
|
||||
PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_PLL3;
|
||||
// I2C4 from PLL3 rclk
|
||||
PeriphClkInitStruct.I2c4ClockSelection = 0;
|
||||
//PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_PLL3;
|
||||
// SPI123 from PLL2 pclk
|
||||
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;
|
||||
// SPI45 from PLL2 qclk
|
||||
PeriphClkInitStruct.Spi45ClockSelection = 0;
|
||||
//PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL2;
|
||||
// SPI6 from PLL2 qclk
|
||||
PeriphClkInitStruct.Spi6ClockSelection = 0;
|
||||
//PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2;
|
||||
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* ARDUINO_GENERIC_* */
|
||||
@ -0,0 +1,309 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2020-2021, STMicroelectronics
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* STM32 pins number
|
||||
*----------------------------------------------------------------------------*/
|
||||
#define PA0 PIN_A0
|
||||
#define PA1 PIN_A1
|
||||
#define PA2 PIN_A2
|
||||
#define PA3 PIN_A3
|
||||
#define PA4 PIN_A4
|
||||
#define PA5 PIN_A5
|
||||
#define PA6 PIN_A6
|
||||
#define PA7 PIN_A7
|
||||
#define PA8 8
|
||||
#define PA9 9
|
||||
#define PA10 10
|
||||
#define PA11 11
|
||||
#define PA12 12
|
||||
#define PA13 13
|
||||
#define PA14 14
|
||||
#define PA15 15
|
||||
#define PB0 PIN_A8
|
||||
#define PB1 PIN_A9
|
||||
#define PB2 18
|
||||
#define PB3 19
|
||||
#define PB4 20
|
||||
#define PB5 21
|
||||
#define PB6 22
|
||||
#define PB7 23
|
||||
#define PB8 24
|
||||
#define PB9 25
|
||||
#define PB10 26
|
||||
#define PB11 27
|
||||
#define PB12 28
|
||||
#define PB13 29
|
||||
#define PB14 30
|
||||
#define PB15 31
|
||||
#define PC0 PIN_A10
|
||||
#define PC1 PIN_A11
|
||||
#define PC4 PIN_A12
|
||||
#define PC5 PIN_A13
|
||||
#define PC6 36
|
||||
#define PC7 37
|
||||
#define PC8 38
|
||||
#define PC9 39
|
||||
#define PC10 40
|
||||
#define PC11 41
|
||||
#define PC12 42
|
||||
#define PC13 43
|
||||
#define PC14 44
|
||||
#define PC15 45
|
||||
#define PD0 46
|
||||
#define PD1 47
|
||||
#define PD2 48
|
||||
#define PD3 49
|
||||
#define PD4 50
|
||||
#define PD5 51
|
||||
#define PD6 52
|
||||
#define PD7 53
|
||||
#define PD8 54
|
||||
#define PD9 55
|
||||
#define PD10 56
|
||||
#define PD11 57
|
||||
#define PD12 58
|
||||
#define PD13 59
|
||||
#define PD14 60
|
||||
#define PD15 61
|
||||
#define PE0 62
|
||||
#define PE1 63
|
||||
#define PE2 64
|
||||
#define PE3 65
|
||||
#define PE4 66
|
||||
#define PE5 67
|
||||
#define PE6 68
|
||||
#define PE7 69
|
||||
#define PE8 70
|
||||
#define PE9 71
|
||||
#define PE10 72
|
||||
#define PE11 73
|
||||
#define PE12 74
|
||||
#define PE13 75
|
||||
#define PE14 76
|
||||
#define PE15 77
|
||||
#define PF0 78
|
||||
#define PF1 79
|
||||
#define PF2 80
|
||||
#define PF3 PIN_A14
|
||||
#define PF4 PIN_A15
|
||||
#define PF5 PIN_A16
|
||||
#define PF6 PIN_A17
|
||||
#define PF7 PIN_A18
|
||||
#define PF8 PIN_A19
|
||||
#define PF9 PIN_A20
|
||||
#define PF10 PIN_A21
|
||||
#define PF11 PIN_A22
|
||||
#define PF12 PIN_A23
|
||||
#define PF13 PIN_A24
|
||||
#define PF14 PIN_A25
|
||||
#define PF15 93
|
||||
#define PG0 94
|
||||
#define PG1 95
|
||||
#define PG2 96
|
||||
#define PG3 97
|
||||
#define PG4 98
|
||||
#define PG5 99
|
||||
#define PG6 100
|
||||
#define PG7 101
|
||||
#define PG8 102
|
||||
#define PG9 103
|
||||
#define PG10 104
|
||||
#define PG11 105
|
||||
#define PG12 106
|
||||
#define PG13 107
|
||||
#define PG14 108
|
||||
#define PG15 109
|
||||
#define PH0 110
|
||||
#define PH1 111
|
||||
#define PC2_C PIN_A26
|
||||
#define PC3_C PIN_A27
|
||||
|
||||
// Alternate pins number
|
||||
#define PA0_ALT1 (PA0 | ALT1)
|
||||
#define PA1_ALT1 (PA1 | ALT1)
|
||||
#define PA1_ALT2 (PA1 | ALT2)
|
||||
#define PA2_ALT1 (PA2 | ALT1)
|
||||
#define PA2_ALT2 (PA2 | ALT2)
|
||||
#define PA3_ALT1 (PA3 | ALT1)
|
||||
#define PA3_ALT2 (PA3 | ALT2)
|
||||
#define PA4_ALT1 (PA4 | ALT1)
|
||||
#define PA4_ALT2 (PA4 | ALT2)
|
||||
#define PA5_ALT1 (PA5 | ALT1)
|
||||
#define PA6_ALT1 (PA6 | ALT1)
|
||||
#define PA7_ALT1 (PA7 | ALT1)
|
||||
#define PA7_ALT2 (PA7 | ALT2)
|
||||
#define PA7_ALT3 (PA7 | ALT3)
|
||||
#define PA8_ALT1 (PA8 | ALT1)
|
||||
#define PA9_ALT1 (PA9 | ALT1)
|
||||
#define PA10_ALT1 (PA10 | ALT1)
|
||||
#define PA11_ALT1 (PA11 | ALT1)
|
||||
#define PA12_ALT1 (PA12 | ALT1)
|
||||
#define PA15_ALT1 (PA15 | ALT1)
|
||||
#define PA15_ALT2 (PA15 | ALT2)
|
||||
#define PB0_ALT1 (PB0 | ALT1)
|
||||
#define PB0_ALT2 (PB0 | ALT2)
|
||||
#define PB1_ALT1 (PB1 | ALT1)
|
||||
#define PB1_ALT2 (PB1 | ALT2)
|
||||
#define PB3_ALT1 (PB3 | ALT1)
|
||||
#define PB3_ALT2 (PB3 | ALT2)
|
||||
#define PB4_ALT1 (PB4 | ALT1)
|
||||
#define PB4_ALT2 (PB4 | ALT2)
|
||||
#define PB5_ALT1 (PB5 | ALT1)
|
||||
#define PB5_ALT2 (PB5 | ALT2)
|
||||
#define PB6_ALT1 (PB6 | ALT1)
|
||||
#define PB6_ALT2 (PB6 | ALT2)
|
||||
#define PB7_ALT1 (PB7 | ALT1)
|
||||
#define PB8_ALT1 (PB8 | ALT1)
|
||||
#define PB8_ALT2 (PB8 | ALT2)
|
||||
#define PB9_ALT1 (PB9 | ALT1)
|
||||
#define PB9_ALT2 (PB9 | ALT2)
|
||||
#define PB14_ALT1 (PB14 | ALT1)
|
||||
#define PB14_ALT2 (PB14 | ALT2)
|
||||
#define PB15_ALT1 (PB15 | ALT1)
|
||||
#define PB15_ALT2 (PB15 | ALT2)
|
||||
#define PC0_ALT1 (PC0 | ALT1)
|
||||
#define PC0_ALT2 (PC0 | ALT2)
|
||||
#define PC1_ALT1 (PC1 | ALT1)
|
||||
#define PC1_ALT2 (PC1 | ALT2)
|
||||
#define PC4_ALT1 (PC4 | ALT1)
|
||||
#define PC5_ALT1 (PC5 | ALT1)
|
||||
#define PC6_ALT1 (PC6 | ALT1)
|
||||
#define PC6_ALT2 (PC6 | ALT2)
|
||||
#define PC7_ALT1 (PC7 | ALT1)
|
||||
#define PC7_ALT2 (PC7 | ALT2)
|
||||
#define PC8_ALT1 (PC8 | ALT1)
|
||||
#define PC9_ALT1 (PC9 | ALT1)
|
||||
#define PC10_ALT1 (PC10 | ALT1)
|
||||
#define PC11_ALT1 (PC11 | ALT1)
|
||||
#define PF0_ALT1 (PF0 | ALT1)
|
||||
#define PF1_ALT1 (PF1 | ALT1)
|
||||
#define PF6_ALT1 (PF6 | ALT1)
|
||||
#define PF7_ALT1 (PF7 | ALT1)
|
||||
#define PF8_ALT1 (PF8 | ALT1)
|
||||
#define PF8_ALT2 (PF8 | ALT2)
|
||||
#define PF9_ALT1 (PF9 | ALT1)
|
||||
#define PF9_ALT2 (PF9 | ALT2)
|
||||
#define PG13_ALT1 (PG13 | ALT1)
|
||||
|
||||
#define NUM_DIGITAL_PINS 114
|
||||
#define NUM_DUALPAD_PINS 2
|
||||
#define NUM_ANALOG_INPUTS 28
|
||||
#define NUM_ANALOG_FIRST PA0
|
||||
|
||||
// On-board LED pin number
|
||||
#ifndef LED_BUILTIN
|
||||
#define LED_BUILTIN PNUM_NOT_DEFINED
|
||||
#endif
|
||||
|
||||
// On-board user button
|
||||
#ifndef USER_BTN
|
||||
#define USER_BTN PNUM_NOT_DEFINED
|
||||
#endif
|
||||
|
||||
// SPI definitions
|
||||
#ifndef PIN_SPI_SS
|
||||
#define PIN_SPI_SS PA4
|
||||
#endif
|
||||
#ifndef PIN_SPI_SS1
|
||||
#define PIN_SPI_SS1 PA15
|
||||
#endif
|
||||
#ifndef PIN_SPI_SS2
|
||||
#define PIN_SPI_SS2 PG10
|
||||
#endif
|
||||
#ifndef PIN_SPI_SS3
|
||||
#define PIN_SPI_SS3 PNUM_NOT_DEFINED
|
||||
#endif
|
||||
#ifndef PIN_SPI_MOSI
|
||||
#define PIN_SPI_MOSI PA7
|
||||
#endif
|
||||
#ifndef PIN_SPI_MISO
|
||||
#define PIN_SPI_MISO PA6
|
||||
#endif
|
||||
#ifndef PIN_SPI_SCK
|
||||
#define PIN_SPI_SCK PA5
|
||||
#endif
|
||||
|
||||
// I2C definitions
|
||||
#ifndef PIN_WIRE_SDA
|
||||
#define PIN_WIRE_SDA PB7
|
||||
#endif
|
||||
#ifndef PIN_WIRE_SCL
|
||||
#define PIN_WIRE_SCL PB6
|
||||
#endif
|
||||
|
||||
// Timer Definitions
|
||||
// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
|
||||
#ifndef TIMER_TONE
|
||||
#define TIMER_TONE TIM6
|
||||
#endif
|
||||
#ifndef TIMER_SERVO
|
||||
#define TIMER_SERVO TIM7
|
||||
#endif
|
||||
|
||||
// UART Definitions
|
||||
#ifndef SERIAL_UART_INSTANCE
|
||||
#define SERIAL_UART_INSTANCE 4
|
||||
#endif
|
||||
|
||||
// Default pin used for generic 'Serial' instance
|
||||
// Mandatory for Firmata
|
||||
#ifndef PIN_SERIAL_RX
|
||||
#define PIN_SERIAL_RX PA1
|
||||
#endif
|
||||
#ifndef PIN_SERIAL_TX
|
||||
#define PIN_SERIAL_TX PA0
|
||||
#endif
|
||||
|
||||
// Extra HAL modules
|
||||
#if !defined(HAL_DAC_MODULE_DISABLED)
|
||||
#define HAL_DAC_MODULE_ENABLED
|
||||
#endif
|
||||
#if !defined(HAL_ETH_MODULE_DISABLED)
|
||||
#define HAL_ETH_MODULE_ENABLED
|
||||
#endif
|
||||
#if !defined(HAL_OSPI_MODULE_DISABLED)
|
||||
#define HAL_OSPI_MODULE_ENABLED
|
||||
#endif
|
||||
#if !defined(HAL_SD_MODULE_DISABLED)
|
||||
#define HAL_SD_MODULE_ENABLED
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Arduino objects - C++ only
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
// These serial port names are intended to allow libraries and architecture-neutral
|
||||
// sketches to automatically default to the correct port name for a particular type
|
||||
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
||||
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
||||
//
|
||||
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
||||
//
|
||||
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
||||
//
|
||||
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
||||
// pins are NOT connected to anything by default.
|
||||
#ifndef SERIAL_PORT_MONITOR
|
||||
#define SERIAL_PORT_MONITOR Serial
|
||||
#endif
|
||||
#ifndef SERIAL_PORT_HARDWARE
|
||||
#define SERIAL_PORT_HARDWARE Serial
|
||||
#endif
|
||||
#endif
|
||||
@ -130,3 +130,10 @@ debug_tool = cmsis-dap
|
||||
[env:STM32H723ZE_btt]
|
||||
extends = STM32H723Zx_btt
|
||||
board = marlin_STM32H723ZE
|
||||
|
||||
#
|
||||
# BigTreeTech Kraken V1.0 (STM32H723ZGT6 ARM Cortex-M7)
|
||||
#
|
||||
[env:STM32H723ZG_btt]
|
||||
extends = STM32H723Zx_btt
|
||||
board = marlin_STM32H723ZG
|
||||
|
||||
Loading…
Reference in New Issue
Block a user