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349 lines
13 KiB
C
349 lines
13 KiB
C
/**********************************************************************
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* $Id$ lpc17xx_pwm.h 2011-03-31
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*//**
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* @file lpc17xx_pwm.h
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* @brief Contains all macro definitions and function prototypes
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* support for PWM firmware library on LPC17xx
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* @version 2.1
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* @date 31. Mar. 2011
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* @author NXP MCU SW Application Team
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*
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* Copyright(C) 2011, NXP Semiconductor
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* All rights reserved.
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*
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***********************************************************************
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors'
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* relevant copyright in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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**********************************************************************/
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/* Peripheral group ----------------------------------------------------------- */
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/** @defgroup PWM PWM (Pulse Width Modulator)
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* @ingroup LPC1700CMSIS_FwLib_Drivers
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* @{
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*/
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#ifndef LPC17XX_PWM_H_
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#define LPC17XX_PWM_H_
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/* Includes ------------------------------------------------------------------- */
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#include "LPC17xx.h"
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#include "lpc_types.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/* Private Macros ------------------------------------------------------------- */
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/** @defgroup PWM_Private_Macros PWM Private Macros
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* @{
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*/
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/* --------------------- BIT DEFINITIONS -------------------------------------- */
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/**********************************************************************
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* IR register definitions
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**********************************************************************/
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/** Interrupt flag for PWM match channel for 6 channel */
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#define PWM_IR_PWMMRn(n) ((uint32_t)((n<4)?(1<<n):(1<<(n+4))))
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/** Interrupt flag for capture input */
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#define PWM_IR_PWMCAPn(n) ((uint32_t)(1<<(n+4)))
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/** IR register mask */
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#define PWM_IR_BITMASK ((uint32_t)(0x0000073F))
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/**********************************************************************
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* TCR register definitions
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**********************************************************************/
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/** TCR register mask */
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#define PWM_TCR_BITMASK ((uint32_t)(0x0000000B))
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#define PWM_TCR_COUNTER_ENABLE ((uint32_t)(1<<0)) /*!< PWM Counter Enable */
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#define PWM_TCR_COUNTER_RESET ((uint32_t)(1<<1)) /*!< PWM Counter Reset */
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#define PWM_TCR_PWM_ENABLE ((uint32_t)(1<<3)) /*!< PWM Enable */
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/**********************************************************************
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* CTCR register definitions
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**********************************************************************/
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/** CTCR register mask */
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#define PWM_CTCR_BITMASK ((uint32_t)(0x0000000F))
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/** PWM Counter-Timer Mode */
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#define PWM_CTCR_MODE(n) ((uint32_t)(n&0x03))
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/** PWM Capture input select */
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#define PWM_CTCR_SELECT_INPUT(n) ((uint32_t)((n&0x03)<<2))
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/**********************************************************************
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* MCR register definitions
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**********************************************************************/
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/** MCR register mask */
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#define PWM_MCR_BITMASK ((uint32_t)(0x001FFFFF))
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/** generate a PWM interrupt when a MATCHn occurs */
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#define PWM_MCR_INT_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07))))
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/** reset the PWM when a MATCHn occurs */
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#define PWM_MCR_RESET_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+1)))
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/** stop the PWM when a MATCHn occurs */
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#define PWM_MCR_STOP_ON_MATCH(n) ((uint32_t)(1<<(((n&0x7)<<1)+(n&0x07)+2)))
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/**********************************************************************
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* CCR register definitions
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**********************************************************************/
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/** CCR register mask */
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#define PWM_CCR_BITMASK ((uint32_t)(0x0000003F))
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/** PCAPn is rising edge sensitive */
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#define PWM_CCR_CAP_RISING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1))))
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/** PCAPn is falling edge sensitive */
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#define PWM_CCR_CAP_FALLING(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+1)))
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/** PWM interrupt is generated on a PCAP event */
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#define PWM_CCR_INT_ON_CAP(n) ((uint32_t)(1<<(((n&0x2)<<1)+(n&0x1)+2)))
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/**********************************************************************
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* PCR register definitions
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**********************************************************************/
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/** PCR register mask */
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#define PWM_PCR_BITMASK (uint32_t)0x00007E7C
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/** PWM output n is a single edge controlled output */
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#define PWM_PCR_PWMSELn(n) ((uint32_t)(((n&0x7)<2) ? 0 : (1<<n)))
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/** enable PWM output n */
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#define PWM_PCR_PWMENAn(n) ((uint32_t)(((n&0x7)<1) ? 0 : (1<<(n+8))))
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/**********************************************************************
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* LER register definitions
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**********************************************************************/
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/** LER register mask*/
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#define PWM_LER_BITMASK ((uint32_t)(0x0000007F))
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/** PWM MATCHn register update control */
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#define PWM_LER_EN_MATCHn_LATCH(n) ((uint32_t)((n<7) ? (1<<n) : 0))
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/* ---------------- CHECK PARAMETER DEFINITIONS ---------------------------- */
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/** Macro to determine if it is valid PWM peripheral or not */
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#define PARAM_PWMx(n) (((uint32_t *)n)==((uint32_t *)LPC_PWM1))
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/** Macro check PWM1 match channel value */
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#define PARAM_PWM1_MATCH_CHANNEL(n) (n<=6)
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/** Macro check PWM1 channel value */
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#define PARAM_PWM1_CHANNEL(n) ((n>=1) && (n<=6))
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/** Macro check PWM1 edge channel mode */
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#define PARAM_PWM1_EDGE_MODE_CHANNEL(n) ((n>=2) && (n<=6))
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/** Macro check PWM1 capture channel mode */
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#define PARAM_PWM1_CAPTURE_CHANNEL(n) ((n==0) || (n==1))
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/** Macro check PWM1 interrupt status type */
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#define PARAM_PWM_INTSTAT(n) ((n==PWM_INTSTAT_MR0) || (n==PWM_INTSTAT_MR1) || (n==PWM_INTSTAT_MR2) \
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|| (n==PWM_INTSTAT_MR3) || (n==PWM_INTSTAT_MR4) || (n==PWM_INTSTAT_MR5) \
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|| (n==PWM_INTSTAT_MR6) || (n==PWM_INTSTAT_CAP0) || (n==PWM_INTSTAT_CAP1))
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/**
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* @}
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*/
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/* Public Types --------------------------------------------------------------- */
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/** @defgroup PWM_Public_Types PWM Public Types
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* @{
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*/
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/** @brief Configuration structure in PWM TIMER mode */
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typedef struct {
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uint8_t PrescaleOption; /**< Prescale option, should be:
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- PWM_TIMER_PRESCALE_TICKVAL: Prescale in absolute value
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- PWM_TIMER_PRESCALE_USVAL: Prescale in microsecond value
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*/
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uint8_t Reserved[3];
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uint32_t PrescaleValue; /**< Prescale value, 32-bit long, should be matched
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with PrescaleOption
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*/
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} PWM_TIMERCFG_Type;
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/** @brief Configuration structure in PWM COUNTER mode */
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typedef struct {
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uint8_t CounterOption; /**< Counter Option, should be:
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- PWM_COUNTER_RISING: Rising Edge
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- PWM_COUNTER_FALLING: Falling Edge
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- PWM_COUNTER_ANY: Both rising and falling mode
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*/
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uint8_t CountInputSelect; /**< Counter input select, should be:
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- PWM_COUNTER_PCAP1_0: PWM Counter input selected is PCAP1.0 pin
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- PWM_COUNTER_PCAP1_1: PWM Counter input selected is PCAP1.1 pin
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*/
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uint8_t Reserved[2];
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} PWM_COUNTERCFG_Type;
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/** @brief PWM Match channel configuration structure */
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typedef struct {
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uint8_t MatchChannel; /**< Match channel, should be in range
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from 0..6 */
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uint8_t IntOnMatch; /**< Interrupt On match, should be:
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- ENABLE: Enable this function.
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- DISABLE: Disable this function.
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*/
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uint8_t StopOnMatch; /**< Stop On match, should be:
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- ENABLE: Enable this function.
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- DISABLE: Disable this function.
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*/
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uint8_t ResetOnMatch; /**< Reset On match, should be:
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- ENABLE: Enable this function.
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- DISABLE: Disable this function.
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*/
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} PWM_MATCHCFG_Type;
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/** @brief PWM Capture Input configuration structure */
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typedef struct {
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uint8_t CaptureChannel; /**< Capture channel, should be in range
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from 0..1 */
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uint8_t RisingEdge; /**< caption rising edge, should be:
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- ENABLE: Enable rising edge.
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- DISABLE: Disable this function.
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*/
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uint8_t FallingEdge; /**< caption falling edge, should be:
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- ENABLE: Enable falling edge.
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- DISABLE: Disable this function.
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*/
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uint8_t IntOnCaption; /**< Interrupt On caption, should be:
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- ENABLE: Enable interrupt function.
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- DISABLE: Disable this function.
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*/
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} PWM_CAPTURECFG_Type;
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/* Timer/Counter in PWM configuration type definition -----------------------------------*/
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/** @brief PMW TC mode select option */
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typedef enum {
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PWM_MODE_TIMER = 0, /*!< PWM using Timer mode */
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PWM_MODE_COUNTER /*!< PWM using Counter mode */
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} PWM_TC_MODE_OPT;
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#define PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER))
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/** @brief PWM Timer/Counter prescale option */
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typedef enum
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{
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PWM_TIMER_PRESCALE_TICKVAL = 0, /*!< Prescale in absolute value */
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PWM_TIMER_PRESCALE_USVAL /*!< Prescale in microsecond value */
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} PWM_TIMER_PRESCALE_OPT;
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#define PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL))
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/** @brief PWM Input Select in counter mode */
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typedef enum {
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PWM_COUNTER_PCAP1_0 = 0, /*!< PWM Counter input selected is PCAP1.0 pin */
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PWM_COUNTER_PCAP1_1 /*!< PWM counter input selected is CAP1.1 pin */
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} PWM_COUNTER_INPUTSEL_OPT;
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#define PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1))
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/** @brief PWM Input Edge Option in counter mode */
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typedef enum {
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PWM_COUNTER_RISING = 1, /*!< Rising edge mode */
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PWM_COUNTER_FALLING = 2, /*!< Falling edge mode */
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PWM_COUNTER_ANY = 3 /*!< Both rising and falling mode */
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} PWM_COUNTER_EDGE_OPT;
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#define PARAM_PWM_COUNTER_EDGE(n) ((n==PWM_COUNTER_RISING) || (n==PWM_COUNTER_FALLING) \
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|| (n==PWM_COUNTER_ANY))
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/* PWM configuration type definition ----------------------------------------------------- */
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/** @brief PWM operating mode options */
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typedef enum {
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PWM_CHANNEL_SINGLE_EDGE, /*!< PWM Channel Single edge mode */
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PWM_CHANNEL_DUAL_EDGE /*!< PWM Channel Dual edge mode */
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} PWM_CHANNEL_EDGE_OPT;
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#define PARAM_PWM_CHANNEL_EDGE(n) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE))
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/** @brief PWM update type */
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typedef enum {
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PWM_MATCH_UPDATE_NOW = 0, /**< PWM Match Channel Update Now */
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PWM_MATCH_UPDATE_NEXT_RST /**< PWM Match Channel Update on next
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PWM Counter resetting */
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} PWM_MATCH_UPDATE_OPT;
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#define PARAM_PWM_MATCH_UPDATE(n) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST))
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/** @brief PWM interrupt status type definition ----------------------------------------------------- */
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/** @brief PWM Interrupt status type */
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typedef enum
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{
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PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0), /**< Interrupt flag for PWM match channel 0 */
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PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1), /**< Interrupt flag for PWM match channel 1 */
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PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2), /**< Interrupt flag for PWM match channel 2 */
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PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3), /**< Interrupt flag for PWM match channel 3 */
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PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0), /**< Interrupt flag for capture input 0 */
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PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1), /**< Interrupt flag for capture input 1 */
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PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4), /**< Interrupt flag for PWM match channel 4 */
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PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5), /**< Interrupt flag for PWM match channel 5 */
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PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6) /**< Interrupt flag for PWM match channel 6 */
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}PWM_INTSTAT_TYPE;
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/** @brief Match update structure */
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typedef struct
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{
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uint32_t Matchvalue;
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FlagStatus Status;
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}PWM_Match_T;
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/**
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* @}
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*/
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/* Public Functions ----------------------------------------------------------- */
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/** @defgroup PWM_Public_Functions PWM Public Functions
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* @{
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*/
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void PWM_PinConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWM_Channel, uint8_t PinselOption);
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IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag);
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void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag);
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void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct);
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void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct);
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void PWM_DeInit (LPC_PWM_TypeDef *PWMx);
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void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState);
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void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState);
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void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx);
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void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct);
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void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct);
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uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel);
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void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \
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uint32_t MatchValue, uint8_t UpdateType);
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void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption);
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void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* LPC17XX_PWM_H_ */
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/**
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* @}
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*/
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/* --------------------------------- End Of File ------------------------------ */
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