mirror of
https://github.com/MarlinFirmware/Marlin.git
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a0b00d29e3
Supports both dual and single head printers (with the correct config). Includes community sourced feed rate fix. Rename / move files. Remove redundant definitions.
192 lines
6.4 KiB
C++
192 lines
6.4 KiB
C++
/**
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* Marlin 3D Printer Firmware
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* Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#ifndef ULCDST7920_H
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#define ULCDST7920_H
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#include "Marlin.h"
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#if ENABLED(U8GLIB_ST7920)
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#define ST7920_CLK_PIN LCD_PINS_D4
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#define ST7920_DAT_PIN LCD_PINS_ENABLE
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#define ST7920_CS_PIN LCD_PINS_RS
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//#define PAGE_HEIGHT 8 //128 byte framebuffer
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//#define PAGE_HEIGHT 16 //256 byte framebuffer
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#define PAGE_HEIGHT 32 //512 byte framebuffer
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#define LCD_PIXEL_WIDTH 128
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#define LCD_PIXEL_HEIGHT 64
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#include <U8glib.h>
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//set optimization so ARDUINO optimizes this file
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#pragma GCC optimize (3)
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#define DELAY_0_NOP NOOP
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#define DELAY_1_NOP __asm__("nop\n\t")
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#define DELAY_2_NOP __asm__("nop\n\t" "nop\n\t")
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#define DELAY_3_NOP __asm__("nop\n\t" "nop\n\t" "nop\n\t")
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#define DELAY_4_NOP __asm__("nop\n\t" "nop\n\t" "nop\n\t" "nop\n\t")
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// If you want you can define your own set of delays in Configuration.h
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//#define ST7920_DELAY_1 DELAY_0_NOP
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//#define ST7920_DELAY_2 DELAY_0_NOP
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//#define ST7920_DELAY_3 DELAY_0_NOP
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#if F_CPU >= 20000000
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#define CPU_ST7920_DELAY_1 DELAY_0_NOP
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#define CPU_ST7920_DELAY_2 DELAY_0_NOP
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#define CPU_ST7920_DELAY_3 DELAY_1_NOP
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#elif (MOTHERBOARD == BOARD_3DRAG) || (MOTHERBOARD == BOARD_K8200) || (MOTHERBOARD == BOARD_K8400)
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#define CPU_ST7920_DELAY_1 DELAY_0_NOP
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#define CPU_ST7920_DELAY_2 DELAY_3_NOP
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#define CPU_ST7920_DELAY_3 DELAY_0_NOP
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#elif (MOTHERBOARD == BOARD_MINIRAMBO)
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#define CPU_ST7920_DELAY_1 DELAY_0_NOP
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#define CPU_ST7920_DELAY_2 DELAY_4_NOP
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#define CPU_ST7920_DELAY_3 DELAY_0_NOP
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#elif (MOTHERBOARD == BOARD_RAMBO)
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#define CPU_ST7920_DELAY_1 DELAY_0_NOP
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#define CPU_ST7920_DELAY_2 DELAY_0_NOP
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#define CPU_ST7920_DELAY_3 DELAY_0_NOP
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#elif F_CPU == 16000000
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#define CPU_ST7920_DELAY_1 DELAY_0_NOP
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#define CPU_ST7920_DELAY_2 DELAY_0_NOP
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#define CPU_ST7920_DELAY_3 DELAY_1_NOP
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#else
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#error "No valid condition for delays in 'ultralcd_st7920_u8glib_rrd.h'"
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#endif
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#ifndef ST7920_DELAY_1
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#define ST7920_DELAY_1 CPU_ST7920_DELAY_1
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#endif
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#ifndef ST7920_DELAY_2
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#define ST7920_DELAY_2 CPU_ST7920_DELAY_2
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#endif
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#ifndef ST7920_DELAY_3
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#define ST7920_DELAY_3 CPU_ST7920_DELAY_3
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#endif
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#define ST7920_SND_BIT \
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WRITE(ST7920_CLK_PIN, LOW); ST7920_DELAY_1; \
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WRITE(ST7920_DAT_PIN, val & 0x80); ST7920_DELAY_2; \
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WRITE(ST7920_CLK_PIN, HIGH); ST7920_DELAY_3; \
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val <<= 1
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static void ST7920_SWSPI_SND_8BIT(uint8_t val) {
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ST7920_SND_BIT; // 1
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ST7920_SND_BIT; // 2
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ST7920_SND_BIT; // 3
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ST7920_SND_BIT; // 4
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ST7920_SND_BIT; // 5
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ST7920_SND_BIT; // 6
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ST7920_SND_BIT; // 7
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ST7920_SND_BIT; // 8
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}
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#define ST7920_CS() {WRITE(ST7920_CS_PIN,1);u8g_10MicroDelay();}
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#define ST7920_NCS() {WRITE(ST7920_CS_PIN,0);}
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#define ST7920_SET_CMD() {ST7920_SWSPI_SND_8BIT(0xf8);u8g_10MicroDelay();}
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#define ST7920_SET_DAT() {ST7920_SWSPI_SND_8BIT(0xfa);u8g_10MicroDelay();}
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#define ST7920_WRITE_BYTE(a) {ST7920_SWSPI_SND_8BIT((uint8_t)((a)&0xf0u));ST7920_SWSPI_SND_8BIT((uint8_t)((a)<<4u));u8g_10MicroDelay();}
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#define ST7920_WRITE_BYTES(p,l) {uint8_t i;for(i=0;i<l;i++){ST7920_SWSPI_SND_8BIT(*p&0xf0);ST7920_SWSPI_SND_8BIT(*p<<4);p++;}u8g_10MicroDelay();}
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uint8_t u8g_dev_rrd_st7920_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
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uint8_t i, y;
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switch (msg) {
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case U8G_DEV_MSG_INIT: {
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OUT_WRITE(ST7920_CS_PIN, LOW);
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OUT_WRITE(ST7920_DAT_PIN, LOW);
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OUT_WRITE(ST7920_CLK_PIN, HIGH);
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ST7920_CS();
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u8g_Delay(120); //initial delay for boot up
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ST7920_SET_CMD();
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ST7920_WRITE_BYTE(0x08); //display off, cursor+blink off
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ST7920_WRITE_BYTE(0x01); //clear CGRAM ram
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u8g_Delay(15); //delay for CGRAM clear
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ST7920_WRITE_BYTE(0x3E); //extended mode + GDRAM active
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for (y = 0; y < (LCD_PIXEL_HEIGHT) / 2; y++) { //clear GDRAM
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ST7920_WRITE_BYTE(0x80 | y); //set y
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ST7920_WRITE_BYTE(0x80); //set x = 0
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ST7920_SET_DAT();
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for (i = 0; i < 2 * (LCD_PIXEL_WIDTH) / 8; i++) //2x width clears both segments
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ST7920_WRITE_BYTE(0);
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ST7920_SET_CMD();
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}
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ST7920_WRITE_BYTE(0x0C); //display on, cursor+blink off
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ST7920_NCS();
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}
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break;
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case U8G_DEV_MSG_STOP:
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break;
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case U8G_DEV_MSG_PAGE_NEXT: {
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uint8_t* ptr;
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u8g_pb_t* pb = (u8g_pb_t*)(dev->dev_mem);
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y = pb->p.page_y0;
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ptr = (uint8_t*)pb->buf;
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ST7920_CS();
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for (i = 0; i < PAGE_HEIGHT; i ++) {
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ST7920_SET_CMD();
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if (y < 32) {
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ST7920_WRITE_BYTE(0x80 | y); //y
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ST7920_WRITE_BYTE(0x80); //x=0
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}
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else {
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ST7920_WRITE_BYTE(0x80 | (y - 32)); //y
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ST7920_WRITE_BYTE(0x80 | 8); //x=64
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}
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ST7920_SET_DAT();
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ST7920_WRITE_BYTES(ptr, (LCD_PIXEL_WIDTH) / 8); //ptr is incremented inside of macro
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y++;
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}
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ST7920_NCS();
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}
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break;
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}
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#if PAGE_HEIGHT == 8
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return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg);
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#elif PAGE_HEIGHT == 16
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return u8g_dev_pb16h1_base_fn(u8g, dev, msg, arg);
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#else
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return u8g_dev_pb32h1_base_fn(u8g, dev, msg, arg);
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#endif
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}
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uint8_t u8g_dev_st7920_128x64_rrd_buf[(LCD_PIXEL_WIDTH) * (PAGE_HEIGHT) / 8] U8G_NOCOMMON;
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u8g_pb_t u8g_dev_st7920_128x64_rrd_pb = {{PAGE_HEIGHT, LCD_PIXEL_HEIGHT, 0, 0, 0}, LCD_PIXEL_WIDTH, u8g_dev_st7920_128x64_rrd_buf};
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u8g_dev_t u8g_dev_st7920_128x64_rrd_sw_spi = {u8g_dev_rrd_st7920_128x64_fn, &u8g_dev_st7920_128x64_rrd_pb, &u8g_com_null_fn};
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class U8GLIB_ST7920_128X64_RRD : public U8GLIB {
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public:
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U8GLIB_ST7920_128X64_RRD(uint8_t dummy) : U8GLIB(&u8g_dev_st7920_128x64_rrd_sw_spi) { UNUSED(dummy); }
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};
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#pragma GCC reset_options
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#endif //U8GLIB_ST7920
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#endif //ULCDST7920_H
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