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a5cf3a190c
* Fix mistake in gitignore file and add in missing core files. The missing leading slash on "lib" meant all folders names lib in the directory tree are ignored, rather than just the top level PlatformIO lib folder * Add LiquidCrystal Library and associated headers modified to compile.
746 lines
21 KiB
C
746 lines
21 KiB
C
/*------------------------------------------------------------------------*/
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/* LPCXpresso176x: MMCv3/SDv1/SDv2 (SPI mode) control module */
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/*------------------------------------------------------------------------*/
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/*
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/ Copyright (C) 2015, ChaN, all right reserved.
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/
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/ * This software is a free software and there is NO WARRANTY.
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/ * No restriction on use. You can use, modify and redistribute it for
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/ personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
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/ * Redistributions of source code must retain the above copyright notice.
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/
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/-------------------------------------------------------------------------*/
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#define SSP_CH 1 /* SSP channel to use (0:SSP0, 1:SSP1) */
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#define CCLK 100000000UL /* cclk frequency [Hz] */
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#define PCLK_SSP 50000000UL /* PCLK frequency to be supplied for SSP [Hz] */
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#define SCLK_FAST 25000000UL /* SCLK frequency under normal operation [Hz] */
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#define SCLK_SLOW 400000UL /* SCLK frequency under initialization [Hz] */
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//#define MMC_CD (!(FIO2PIN1 & _BV(1))) /* Card detect (yes:true, no:false, default:true) */
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#define MMC_WP 0 /* Write protected (yes:true, no:false, default:false) */
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#if SSP_CH == 0
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#define SSPxDR SSP0DR
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#define SSPxSR SSP0SR
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#define SSPxCR0 SSP0CR0
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#define SSPxCR1 SSP0CR1
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#define SSPxCPSR SSP0CPSR
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#define CS_LOW() {FIO0CLR2 = _BV(0);} /* Set P0.16 low */
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#define CS_HIGH() {FIO0SET2 = _BV(0);} /* Set P0.16 high */
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#define PCSSPx PCSSP0
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#define PCLKSSPx PCLK_SSP0
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#define ATTACH_SSP() {\
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__set_PINSEL(0, 15, 2); /* SCK0 */\
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__set_PINSEL(0, 17, 2); /* MISO0 */\
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__set_PINSEL(0, 18, 2); /* MOSI0 */\
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FIO0DIR |= _BV(16); /* CS# (P0.16) */\
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}
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#elif SSP_CH == 1
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#define SSPxDR SSP1DR
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#define SSPxSR SSP1SR
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#define SSPxCR0 SSP1CR0
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#define SSPxCR1 SSP1CR1
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#define SSPxCPSR SSP1CPSR
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#define CS_LOW() {FIO0CLR0 = _BV(6);} /* Set P0.6 low */
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#define CS_HIGH() {FIO0SET0 = _BV(6);} /* Set P0.6 high */
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#define PCSSPx PCSSP1
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#define PCLKSSPx PCLK_SSP1
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#define ATTACH_SSP() {\
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__set_PINSEL(0, 7, 2); /* SCK1 */\
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__set_PINSEL(0, 8, 2); /* MISO1 */\
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__set_PINSEL(0, 9, 2); /* MOSI1 */\
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FIO0DIR |= _BV(6); /* CS# (P0.6) */\
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}
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#endif
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#if PCLK_SSP * 1 == CCLK
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#define PCLKDIV_SSP PCLKDIV_1
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#elif PCLK_SSP * 2 == CCLK
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#define PCLKDIV_SSP PCLKDIV_2
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#elif PCLK_SSP * 4 == CCLK
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#define PCLKDIV_SSP PCLKDIV_4
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#elif PCLK_SSP * 8 == CCLK
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#define PCLKDIV_SSP PCLKDIV_8
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#else
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#error Invalid CCLK:PCLK_SSP combination.
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#endif
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#define FCLK_FAST() { SSPxCR0 = (SSPxCR0 & 0x00FF) | ((PCLK_SSP / 2 / SCLK_FAST) - 1) << 8; }
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#define FCLK_SLOW() { SSPxCR0 = (SSPxCR0 & 0x00FF) | ((PCLK_SSP / 2 / SCLK_SLOW) - 1) << 8; }
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/*--------------------------------------------------------------------------
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Module Private Functions
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---------------------------------------------------------------------------*/
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#include "LPC176x.h"
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#include "diskio.h"
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/* MMC/SD command */
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#define CMD0 (0) /* GO_IDLE_STATE */
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#define CMD1 (1) /* SEND_OP_COND (MMC) */
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#define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */
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#define CMD8 (8) /* SEND_IF_COND */
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#define CMD9 (9) /* SEND_CSD */
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#define CMD10 (10) /* SEND_CID */
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#define CMD12 (12) /* STOP_TRANSMISSION */
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#define ACMD13 (0x80+13) /* SD_STATUS (SDC) */
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#define CMD16 (16) /* SET_BLOCKLEN */
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#define CMD17 (17) /* READ_SINGLE_BLOCK */
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#define CMD18 (18) /* READ_MULTIPLE_BLOCK */
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#define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */
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#define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
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#define CMD24 (24) /* WRITE_BLOCK */
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#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
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#define CMD32 (32) /* ERASE_ER_BLK_START */
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#define CMD33 (33) /* ERASE_ER_BLK_END */
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#define CMD38 (38) /* ERASE */
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#define CMD48 (48) /* READ_EXTR_SINGLE */
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#define CMD49 (49) /* WRITE_EXTR_SINGLE */
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#define CMD55 (55) /* APP_CMD */
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#define CMD58 (58) /* READ_OCR */
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static volatile
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DSTATUS Stat = STA_NOINIT; /* Physical drive status */
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static volatile
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UINT Timer1, Timer2; /* 1kHz decrement timer stopped at zero (disk_timerproc()) */
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static
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BYTE CardType; /* Card type flags */
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/*-----------------------------------------------------------------------*/
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/* Send/Receive data to the MMC (Platform dependent) */
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/*-----------------------------------------------------------------------*/
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/* Exchange a byte */
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static
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BYTE xchg_spi (
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BYTE dat /* Data to send */
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)
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{
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SSPxDR = dat;
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while (SSPxSR & 0x10) ;
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return SSPxDR;
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}
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/* Receive multiple byte */
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static
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void rcvr_spi_multi (
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BYTE *buff, /* Pointer to data buffer */
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UINT btr /* Number of bytes to receive (16, 64 or 512) */
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)
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{
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UINT n;
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WORD d;
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SSPxCR0 |= 0x000F; /* Select 16-bit mode */
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for (n = 0; n < 8; n++) /* Push 8 frames into pipeline */
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SSPxDR = 0xFFFF;
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btr -= 16;
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while (btr >= 2) { /* Receive the data block into buffer */
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btr -= 2;
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while (!(SSPxSR & _BV(2))) ; /* Wait for any data in receive FIFO */
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d = SSPxDR;
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SSPxDR = 0xFFFF;
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*buff++ = d >> 8;
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*buff++ = d;
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}
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for (n = 0; n < 8; n++) { /* Pop remaining frames from pipeline */
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while (!(SSPxSR & _BV(2))) ;
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d = SSPxDR;
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*buff++ = d >> 8;
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*buff++ = d;
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}
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SSPxCR0 &= 0xFFF7; /* Select 8-bit mode */
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}
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#if _DISKIO_WRITE
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/* Send multiple byte */
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static
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void xmit_spi_multi (
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const BYTE *buff, /* Pointer to the data */
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UINT btx /* Number of bytes to send (multiple of 16) */
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)
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{
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UINT n;
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WORD d;
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SSPxCR0 |= 0x000F; /* Select 16-bit mode */
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for (n = 0; n < 8; n++) { /* Push 8 frames into pipeline */
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d = *buff++;
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d = d << 8 | *buff++;
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SSPxDR = d;
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}
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btx -= 16;
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while (btx >= 2) { /* Transmit data block */
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btx -= 2;
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d = *buff++;
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d = d << 8 | *buff++;
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while (!(SSPxSR & _BV(2))) ; /* Wait for any data in receive FIFO */
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SSPxDR; SSPxDR = d;
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}
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for (n = 0; n < 8; n++) { /* Flush pipeline */
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while (!(SSPxSR & _BV(2))) ;
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SSPxDR;
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}
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SSPxCR0 &= 0xFFF7; /* Select 8-bit mode */
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}
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#endif
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/*-----------------------------------------------------------------------*/
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/* Wait for card ready */
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/*-----------------------------------------------------------------------*/
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static
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int wait_ready ( /* 1:Ready, 0:Timeout */
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UINT wt /* Timeout [ms] */
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)
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{
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BYTE d;
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Timer2 = wt;
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do {
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d = xchg_spi(0xFF);
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/* This loop takes a time. Insert rot_rdq() here for multitask envilonment. */
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} while (d != 0xFF && Timer2); /* Wait for card goes ready or timeout */
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return (d == 0xFF) ? 1 : 0;
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}
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/*-----------------------------------------------------------------------*/
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/* Deselect card and release SPI */
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/*-----------------------------------------------------------------------*/
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static
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void deselect (void)
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{
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CS_HIGH(); /* CS = H */
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xchg_spi(0xFF); /* Dummy clock (force DO hi-z for multiple slave SPI) */
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}
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/*-----------------------------------------------------------------------*/
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/* Select card and wait for ready */
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/*-----------------------------------------------------------------------*/
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static
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int select (void) /* 1:OK, 0:Timeout */
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{
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CS_LOW(); /* CS = L */
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xchg_spi(0xFF); /* Dummy clock (force DO enabled) */
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if (wait_ready(500)) return 1; /* Leading busy check: Wait for card ready */
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deselect(); /* Timeout */
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return 0;
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}
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/*-----------------------------------------------------------------------*/
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/* Control SPI module (Platform dependent) */
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/*-----------------------------------------------------------------------*/
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static
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void power_on (void) /* Enable SSP module and attach it to I/O pads */
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{
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__set_PCONP(PCSSPx, 1); /* Enable SSP module */
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__set_PCLKSEL(PCLKSSPx, PCLKDIV_SSP); /* Select PCLK frequency for SSP */
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SSPxCPSR = 2; /* CPSDVSR=2 */
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SSPxCR0 = 0x0007; /* Set mode: SPI mode 0, 8-bit */
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SSPxCR1 = 0x2; /* Enable SSP with Master */
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ATTACH_SSP(); /* Attach SSP module to I/O pads */
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CS_HIGH(); /* Set CS# high */
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for (Timer1 = 10; Timer1; ) ; /* 10ms */
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}
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static
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void power_off (void) /* Disable SPI function */
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{
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select(); /* Wait for card ready */
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deselect();
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}
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/*-----------------------------------------------------------------------*/
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/* Receive a data packet from the MMC */
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/*-----------------------------------------------------------------------*/
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static
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int rcvr_datablock ( /* 1:OK, 0:Error */
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BYTE *buff, /* Data buffer */
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UINT btr /* Data block length (byte) */
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)
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{
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BYTE token;
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Timer1 = 200;
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do { /* Wait for DataStart token in timeout of 200ms */
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token = xchg_spi(0xFF);
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/* This loop will take a time. Insert rot_rdq() here for multitask envilonment. */
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} while ((token == 0xFF) && Timer1);
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if(token != 0xFE) return 0; /* Function fails if invalid DataStart token or timeout */
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rcvr_spi_multi(buff, btr); /* Store trailing data to the buffer */
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xchg_spi(0xFF); xchg_spi(0xFF); /* Discard CRC */
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return 1; /* Function succeeded */
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}
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/*-----------------------------------------------------------------------*/
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/* Send a data packet to the MMC */
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/*-----------------------------------------------------------------------*/
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#if _DISKIO_WRITE
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static
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int xmit_datablock ( /* 1:OK, 0:Failed */
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const BYTE *buff, /* Ponter to 512 byte data to be sent */
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BYTE token /* Token */
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)
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{
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BYTE resp;
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if (!wait_ready(500)) return 0; /* Leading busy check: Wait for card ready to accept data block */
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xchg_spi(token); /* Send token */
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if (token == 0xFD) return 1; /* Do not send data if token is StopTran */
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xmit_spi_multi(buff, 512); /* Data */
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xchg_spi(0xFF); xchg_spi(0xFF); /* Dummy CRC */
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resp = xchg_spi(0xFF); /* Receive data resp */
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return (resp & 0x1F) == 0x05 ? 1 : 0; /* Data was accepted or not */
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/* Busy check is done at next transmission */
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}
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#endif
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/*-----------------------------------------------------------------------*/
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/* Send a command packet to the MMC */
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/*-----------------------------------------------------------------------*/
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static
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BYTE send_cmd ( /* Return value: R1 resp (bit7==1:Failed to send) */
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BYTE cmd, /* Command index */
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DWORD arg /* Argument */
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)
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{
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BYTE n, res;
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if (cmd & 0x80) { /* Send a CMD55 prior to ACMD<n> */
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cmd &= 0x7F;
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res = send_cmd(CMD55, 0);
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if (res > 1) return res;
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}
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/* Select the card and wait for ready except to stop multiple block read */
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if (cmd != CMD12) {
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deselect();
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if (!select()) return 0xFF;
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}
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/* Send command packet */
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xchg_spi(0x40 | cmd); /* Start + command index */
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xchg_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
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xchg_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
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xchg_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
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xchg_spi((BYTE)arg); /* Argument[7..0] */
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n = 0x01; /* Dummy CRC + Stop */
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if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) */
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if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) */
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xchg_spi(n);
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/* Receive command resp */
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if (cmd == CMD12) xchg_spi(0xFF); /* Diacard following one byte when CMD12 */
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n = 10; /* Wait for response (10 bytes max) */
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do
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res = xchg_spi(0xFF);
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while ((res & 0x80) && --n);
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return res; /* Return received response */
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}
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/*--------------------------------------------------------------------------
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Public Functions
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---------------------------------------------------------------------------*/
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/*-----------------------------------------------------------------------*/
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/* Initialize disk drive */
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/*-----------------------------------------------------------------------*/
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DSTATUS disk_initialize (
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BYTE drv /* Physical drive number (0) */
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)
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{
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BYTE n, cmd, ty, ocr[4];
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if (drv) return STA_NOINIT; /* Supports only drive 0 */
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power_on(); /* Initialize SPI */
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if (Stat & STA_NODISK) return Stat; /* Is a card existing in the soket? */
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FCLK_SLOW();
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for (n = 10; n; n--) xchg_spi(0xFF); /* Send 80 dummy clocks */
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ty = 0;
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if (send_cmd(CMD0, 0) == 1) { /* Put the card SPI state */
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Timer1 = 1000; /* Initialization timeout = 1 sec */
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if (send_cmd(CMD8, 0x1AA) == 1) { /* Is the catd SDv2? */
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for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get 32 bit return value of R7 resp */
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if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* Does the card support 2.7-3.6V? */
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while (Timer1 && send_cmd(ACMD41, 1UL << 30)) ; /* Wait for end of initialization with ACMD41(HCS) */
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if (Timer1 && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
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for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
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ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* Check if the card is SDv2 */
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}
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}
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} else { /* Not an SDv2 card */
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if (send_cmd(ACMD41, 0) <= 1) { /* SDv1 or MMCv3? */
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ty = CT_SD1; cmd = ACMD41; /* SDv1 (ACMD41(0)) */
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} else {
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ty = CT_MMC; cmd = CMD1; /* MMCv3 (CMD1(0)) */
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}
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while (Timer1 && send_cmd(cmd, 0)) ; /* Wait for the card leaves idle state */
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if (!Timer1 || send_cmd(CMD16, 512) != 0) /* Set block length: 512 */
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ty = 0;
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}
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}
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CardType = ty; /* Card type */
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deselect();
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if (ty) { /* OK */
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FCLK_FAST(); /* Set fast clock */
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Stat &= ~STA_NOINIT; /* Clear STA_NOINIT flag */
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} else { /* Failed */
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power_off();
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Stat = STA_NOINIT;
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}
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return Stat;
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}
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/*-----------------------------------------------------------------------*/
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/* Get disk status */
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/*-----------------------------------------------------------------------*/
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DSTATUS disk_status (
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BYTE drv /* Physical drive number (0) */
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)
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{
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if (drv) return STA_NOINIT; /* Supports only drive 0 */
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return Stat; /* Return disk status */
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}
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/*-----------------------------------------------------------------------*/
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/* Read sector(s) */
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/*-----------------------------------------------------------------------*/
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DRESULT disk_read (
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BYTE drv, /* Physical drive number (0) */
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BYTE *buff, /* Pointer to the data buffer to store read data */
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DWORD sector, /* Start sector number (LBA) */
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UINT count /* Number of sectors to read (1..128) */
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)
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{
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BYTE cmd;
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if (drv || !count) return RES_PARERR; /* Check parameter */
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if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
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if (!(CardType & CT_BLOCK)) sector *= 512; /* LBA ot BA conversion (byte addressing cards) */
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cmd = count > 1 ? CMD18 : CMD17; /* READ_MULTIPLE_BLOCK : READ_SINGLE_BLOCK */
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if (send_cmd(cmd, sector) == 0) {
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do {
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if (!rcvr_datablock(buff, 512)) break;
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buff += 512;
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} while (--count);
|
|
if (cmd == CMD18) send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
|
|
}
|
|
deselect();
|
|
|
|
return count ? RES_ERROR : RES_OK; /* Return result */
|
|
}
|
|
|
|
|
|
|
|
/*-----------------------------------------------------------------------*/
|
|
/* Write sector(s) */
|
|
/*-----------------------------------------------------------------------*/
|
|
|
|
#if _DISKIO_WRITE
|
|
DRESULT disk_write (
|
|
BYTE drv, /* Physical drive number (0) */
|
|
const BYTE *buff, /* Ponter to the data to write */
|
|
DWORD sector, /* Start sector number (LBA) */
|
|
UINT count /* Number of sectors to write (1..128) */
|
|
)
|
|
{
|
|
if (drv || !count) return RES_PARERR; /* Check parameter */
|
|
if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check drive status */
|
|
if (Stat & STA_PROTECT) return RES_WRPRT; /* Check write protect */
|
|
|
|
if (!(CardType & CT_BLOCK)) sector *= 512; /* LBA ==> BA conversion (byte addressing cards) */
|
|
|
|
if (count == 1) { /* Single sector write */
|
|
if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
|
|
&& xmit_datablock(buff, 0xFE)) {
|
|
count = 0;
|
|
}
|
|
}
|
|
else { /* Multiple sector write */
|
|
if (CardType & CT_SDC) send_cmd(ACMD23, count); /* Predefine number of sectors */
|
|
if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
|
|
do {
|
|
if (!xmit_datablock(buff, 0xFC)) break;
|
|
buff += 512;
|
|
} while (--count);
|
|
if (!xmit_datablock(0, 0xFD)) count = 1; /* STOP_TRAN token */
|
|
}
|
|
}
|
|
deselect();
|
|
|
|
return count ? RES_ERROR : RES_OK; /* Return result */
|
|
}
|
|
#endif
|
|
|
|
|
|
/*-----------------------------------------------------------------------*/
|
|
/* Miscellaneous drive controls other than data read/write */
|
|
/*-----------------------------------------------------------------------*/
|
|
|
|
#if _DISKIO_IOCTL
|
|
|
|
DRESULT disk_ioctl (
|
|
BYTE drv, /* Physical drive number (0) */
|
|
BYTE cmd, /* Control command code */
|
|
void *buff /* Pointer to the conrtol data */
|
|
)
|
|
{
|
|
DRESULT res;
|
|
BYTE n, csd[16], *ptr = buff;
|
|
DWORD *dp, st, ed, csize;
|
|
#if _DISKIO_ISDIO
|
|
SDIO_CMD *sdio = buff;
|
|
BYTE rc, *buf;
|
|
UINT dc;
|
|
#endif
|
|
|
|
if (drv) return RES_PARERR; /* Check parameter */
|
|
if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
|
|
|
|
res = RES_ERROR;
|
|
|
|
switch (cmd) {
|
|
case CTRL_SYNC: /* Wait for end of internal write process of the drive */
|
|
if (select()) res = RES_OK;
|
|
break;
|
|
|
|
case GET_SECTOR_COUNT: /* Get drive capacity in unit of sector (DWORD) */
|
|
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
|
|
if ((csd[0] >> 6) == 1) { /* SDC ver 2.00 */
|
|
csize = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
|
|
*(DWORD*)buff = csize << 10;
|
|
} else { /* SDC ver 1.XX or MMC ver 3 */
|
|
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
|
|
csize = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
|
|
*(DWORD*)buff = csize << (n - 9);
|
|
}
|
|
res = RES_OK;
|
|
}
|
|
break;
|
|
|
|
case GET_BLOCK_SIZE: /* Get erase block size in unit of sector (DWORD) */
|
|
if (CardType & CT_SD2) { /* SDC ver 2.00 */
|
|
if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
|
|
xchg_spi(0xFF);
|
|
if (rcvr_datablock(csd, 16)) { /* Read partial block */
|
|
for (n = 64 - 16; n; n--) xchg_spi(0xFF); /* Purge trailing data */
|
|
*(DWORD*)buff = 16UL << (csd[10] >> 4);
|
|
res = RES_OK;
|
|
}
|
|
}
|
|
} else { /* SDC ver 1.XX or MMC */
|
|
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
|
|
if (CardType & CT_SD1) { /* SDC ver 1.XX */
|
|
*(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
|
|
} else { /* MMC */
|
|
*(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
|
|
}
|
|
res = RES_OK;
|
|
}
|
|
}
|
|
break;
|
|
|
|
case CTRL_TRIM: /* Erase a block of sectors (used when _USE_TRIM in ffconf.h is 1) */
|
|
if (!(CardType & CT_SDC)) break; /* Check if the card is SDC */
|
|
if (disk_ioctl(drv, MMC_GET_CSD, csd)) break; /* Get CSD */
|
|
if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break; /* Check if sector erase can be applied to the card */
|
|
dp = buff; st = dp[0]; ed = dp[1]; /* Load sector block */
|
|
if (!(CardType & CT_BLOCK)) {
|
|
st *= 512; ed *= 512;
|
|
}
|
|
if (send_cmd(CMD32, st) == 0 && send_cmd(CMD33, ed) == 0 && send_cmd(CMD38, 0) == 0 && wait_ready(30000)) { /* Erase sector block */
|
|
res = RES_OK; /* FatFs does not check result of this command */
|
|
}
|
|
break;
|
|
|
|
/* Following commands are never used by FatFs module */
|
|
|
|
case MMC_GET_TYPE: /* Get MMC/SDC type (BYTE) */
|
|
*ptr = CardType;
|
|
res = RES_OK;
|
|
break;
|
|
|
|
case MMC_GET_CSD: /* Read CSD (16 bytes) */
|
|
if (send_cmd(CMD9, 0) == 0 && rcvr_datablock(ptr, 16)) { /* READ_CSD */
|
|
res = RES_OK;
|
|
}
|
|
break;
|
|
|
|
case MMC_GET_CID: /* Read CID (16 bytes) */
|
|
if (send_cmd(CMD10, 0) == 0 && rcvr_datablock(ptr, 16)) { /* READ_CID */
|
|
res = RES_OK;
|
|
}
|
|
break;
|
|
|
|
case MMC_GET_OCR: /* Read OCR (4 bytes) */
|
|
if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
|
|
for (n = 4; n; n--) *ptr++ = xchg_spi(0xFF);
|
|
res = RES_OK;
|
|
}
|
|
break;
|
|
|
|
case MMC_GET_SDSTAT: /* Read SD status (64 bytes) */
|
|
if (send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
|
|
xchg_spi(0xFF);
|
|
if (rcvr_datablock(ptr, 64)) res = RES_OK;
|
|
}
|
|
break;
|
|
#if _DISKIO_ISDIO
|
|
case ISDIO_READ:
|
|
sdio = buff;
|
|
if (send_cmd(CMD48, 0x80000000 | sdio->func << 28 | sdio->addr << 9 | ((sdio->ndata - 1) & 0x1FF)) == 0) {
|
|
for (Timer1 = 1000; (rc = xchg_spi(0xFF)) == 0xFF && Timer1; ) ;
|
|
if (rc == 0xFE) {
|
|
for (buf = sdio->data, dc = sdio->ndata; dc; dc--) *buf++ = xchg_spi(0xFF);
|
|
for (dc = 514 - sdio->ndata; dc; dc--) xchg_spi(0xFF);
|
|
res = RES_OK;
|
|
}
|
|
}
|
|
break;
|
|
case ISDIO_WRITE:
|
|
sdio = buff;
|
|
if (send_cmd(CMD49, 0x80000000 | sdio->func << 28 | sdio->addr << 9 | ((sdio->ndata - 1) & 0x1FF)) == 0) {
|
|
xchg_spi(0xFF); xchg_spi(0xFE);
|
|
for (buf = sdio->data, dc = sdio->ndata; dc; dc--) xchg_spi(*buf++);
|
|
for (dc = 514 - sdio->ndata; dc; dc--) xchg_spi(0xFF);
|
|
if ((xchg_spi(0xFF) & 0x1F) == 0x05) res = RES_OK;
|
|
}
|
|
break;
|
|
case ISDIO_MRITE:
|
|
sdio = buff;
|
|
if (send_cmd(CMD49, 0x84000000 | sdio->func << 28 | sdio->addr << 9 | sdio->ndata >> 8) == 0) {
|
|
xchg_spi(0xFF); xchg_spi(0xFE);
|
|
xchg_spi(sdio->ndata);
|
|
for (dc = 513; dc; dc--) xchg_spi(0xFF);
|
|
if ((xchg_spi(0xFF) & 0x1F) == 0x05) res = RES_OK;
|
|
}
|
|
break;
|
|
#endif
|
|
default:
|
|
res = RES_PARERR;
|
|
}
|
|
|
|
deselect();
|
|
return res;
|
|
}
|
|
#endif
|
|
|
|
|
|
/*-----------------------------------------------------------------------*/
|
|
/* Device timer function */
|
|
/*-----------------------------------------------------------------------*/
|
|
/* This function must be called from timer interrupt routine in period
|
|
/ of 1 ms to generate card control timing.
|
|
*/
|
|
|
|
void disk_timerproc (void)
|
|
{
|
|
WORD n;
|
|
BYTE s;
|
|
|
|
|
|
n = Timer1; /* 1kHz decrement timer stopped at 0 */
|
|
if (n) Timer1 = --n;
|
|
n = Timer2;
|
|
if (n) Timer2 = --n;
|
|
|
|
s = Stat;
|
|
if (MMC_WP) { /* Write protected */
|
|
s |= STA_PROTECT;
|
|
} else { /* Write enabled */
|
|
s &= ~STA_PROTECT;
|
|
}
|
|
//if (MMC_CD) { /* Card is in socket */
|
|
s &= ~STA_NODISK;
|
|
//} else { /* Socket empty */
|
|
// s |= (STA_NODISK | STA_NOINIT);
|
|
//}
|
|
Stat = s;
|
|
}
|
|
|