2021-06-08 13:28:02 +00:00
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#include <stddef.h>
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#include <avr/wdt.h>
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#include <avr/interrupt.h>
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#include "xflash_dump.h"
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2021-06-08 15:17:18 +00:00
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#ifdef XFLASH_DUMP
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2021-06-08 13:28:02 +00:00
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#include "xflash.h"
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bool xfdump_check_state()
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{
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uint32_t magic;
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XFLASH_SPI_ENTER();
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xflash_rd_data(DUMP_OFFSET + offsetof(dump_t, header.magic),
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(uint8_t*)&magic, sizeof(magic));
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return magic == DUMP_MAGIC;
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}
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bool xfdump_check_crash()
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{
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2021-06-08 15:14:22 +00:00
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// check_state will call SPI_ENTER for us
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2021-06-08 13:28:02 +00:00
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if(!xfdump_check_state())
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return false;
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uint8_t crash;
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xflash_rd_data(DUMP_OFFSET + offsetof(dump_t, header.crash),
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(uint8_t*)&crash, sizeof(crash));
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return crash;
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}
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void xfdump_reset()
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{
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XFLASH_SPI_ENTER();
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xflash_enable_wr();
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xflash_sector_erase(DUMP_OFFSET + offsetof(dump_t, header.magic));
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xflash_wait_busy();
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}
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static void xfdump_erase()
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{
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XFLASH_SPI_ENTER();
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for(uint32_t addr = DUMP_OFFSET;
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addr < DUMP_OFFSET + DUMP_SIZE;
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addr += 4096)
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{
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xflash_enable_wr();
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xflash_sector_erase(DUMP_OFFSET);
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xflash_wait_busy();
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}
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}
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static void xfdump_dump_core(dump_header_t& hdr, uint32_t addr, uint8_t* buf, uint16_t cnt)
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{
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XFLASH_SPI_ENTER();
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// start by clearing all sectors (we need all of them in any case)
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xfdump_erase();
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// write header
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static_assert(sizeof(hdr) < 256, "header is larger than a single page write");
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xflash_enable_wr();
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xflash_page_program(DUMP_OFFSET, (uint8_t*)&hdr, sizeof(hdr));
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xflash_wait_busy();
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// write data
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xflash_multipage_program(addr, buf, cnt);
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}
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void xfdump_dump()
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{
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dump_header_t buf;
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buf.magic = DUMP_MAGIC;
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buf.regs_present = false;
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buf.crash = false;
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// write sram only
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xfdump_dump_core(buf, DUMP_OFFSET + offsetof(dump_t, data.sram),
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(uint8_t*)SRAM_START, SRAM_SIZE);
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}
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void xfdump_full_dump_and_reset(bool crash)
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{
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dump_header_t buf;
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buf.magic = DUMP_MAGIC;
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buf.regs_present = true;
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buf.crash = crash;
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// disable interrupts for a cleaner register dump
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cli();
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// write all addressable ranges (this will trash bidirectional registers)
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xfdump_dump_core(buf, DUMP_OFFSET + offsetof(dump_t, data),
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0, SRAM_START + SRAM_SIZE);
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// force a reset soon
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wdt_enable(0);
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while(true);
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}
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2021-06-08 15:17:18 +00:00
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#endif
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