2017-12-20 12:42:20 +00:00
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#ifndef _CONFIG_H
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#define _CONFIG_H
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//ADC configuration
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#define ADC_CHAN_MSK 0b0000001001011111 //used AD channels bit mask (0,1,2,3,4,6,9)
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#define ADC_CHAN_CNT 7 //number of used channels)
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#define ADC_OVRSAMPL 16 //oversampling multiplier
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#define ADC_CALLBACK adc_ready //callback function ()
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2018-07-12 15:55:38 +00:00
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//SWI2C configuration
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#define SWI2C
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//#define SWI2C_SDA 20 //SDA on P3
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//#define SWI2C_SCL 21 //SCL on P3
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#define SWI2C_A8
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#define SWI2C_DEL 20 //2us clock delay
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#define SWI2C_TMO 2048 //2048 cycles timeout
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2018-07-12 16:11:07 +00:00
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//PAT9125 configuration
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#define PAT9125_SWI2C
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#define PAT9125_I2C_ADDR 0x75 //ID=LO
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//#define PAT9125_I2C_ADDR 0x79 //ID=HI
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//#define PAT9125_I2C_ADDR 0x73 //ID=NC
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#define PAT9125_XRES 0
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2018-07-22 14:14:13 +00:00
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#define PAT9125_YRES 240
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2018-07-12 16:11:07 +00:00
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2018-03-13 11:55:35 +00:00
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//SM4 configuration
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#define SM4_DEFDELAY 500 //default step delay [us]
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2018-03-29 15:42:41 +00:00
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//TMC2130 - Trinamic stepper driver
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//pinout - hardcoded
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//spi:
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#define TMC2130_SPI_RATE 0 // fosc/4 = 4MHz
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#define TMC2130_SPCR SPI_SPCR(TMC2130_SPI_RATE, 1, 1, 1, 0)
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#define TMC2130_SPSR SPI_SPSR(TMC2130_SPI_RATE)
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2017-12-20 12:42:20 +00:00
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2018-06-07 22:20:28 +00:00
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//W25X20CL configuration
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2018-06-08 23:23:04 +00:00
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//pinout:
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2018-06-07 22:20:28 +00:00
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#define W25X20CL_PIN_CS 32
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2018-06-08 23:23:04 +00:00
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//spi:
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#define W25X20CL_SPI_RATE 0 // fosc/4 = 4MHz
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#define W25X20CL_SPCR SPI_SPCR(W25X20CL_SPI_RATE, 1, 1, 1, 0)
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#define W25X20CL_SPSR SPI_SPSR(W25X20CL_SPI_RATE)
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2018-06-07 22:20:28 +00:00
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2018-05-22 01:20:03 +00:00
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//LANG - Multi-language support
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2018-10-23 15:32:52 +00:00
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#define LANG_MODE 0 // primary language only
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//#define LANG_MODE 1 // sec. language support
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2018-11-21 13:57:20 +00:00
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#define LANG_SIZE_RESERVED 0x2f00 // reserved space for secondary language (12032 bytes)
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2018-05-22 01:20:03 +00:00
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2017-12-20 12:42:20 +00:00
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#endif //_CONFIG_H
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