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Revert "Phase correct PWM for bed, frequency 40KHz."

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PavelSindler 2019-04-01 18:44:13 +02:00 committed by GitHub
parent a60a1cbef4
commit c440ca7369
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GPG key ID: 4AEE18F83AFDEB23
1 changed files with 18 additions and 9 deletions
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27
Firmware/timer02.c
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@ -11,11 +11,19 @@
uint8_t timer02_pwm0 = 0; uint8_t timer02_pwm0 = 0;
void timer02_set_pwm0(uint8_t pwm0) void timer02_set_pwm0(uint8_t pwm0)
{ {
TCCR0A |= (2 << COM0B0); //switch OC0B to OCR mode if (timer02_pwm0 == pwm0) return;
OCR0B = (uint16_t)OCR0A * pwm0 / 255; if (pwm0)
{
TCCR0A |= (2 << COM0B0);
OCR0B = pwm0 - 1;
}
else
{
TCCR0A &= ~(2 << COM0B0);
OCR0B = 0;
}
timer02_pwm0 = pwm0; timer02_pwm0 = pwm0;
} }
@ -31,12 +39,13 @@ void timer02_init(void)
TIMSK0 &= ~(1<<OCIE0B); TIMSK0 &= ~(1<<OCIE0B);
//setup timer0 //setup timer0
TCCR0A = 0x00; //COM_A-B=00, WGM_0-1=00 TCCR0A = 0x00; //COM_A-B=00, WGM_0-1=00
OCR0A = 200; //max PWM value (freq = 40kHz) TCCR0B = (1 << CS00); //WGM_2=0, CS_0-2=011
OCR0B = 0; //current PWM value //switch timer0 to fast pwm mode
//switch timer0 to mode 5 (Phase Correct PWM) TCCR0A |= (3 << WGM00); //WGM_0-1=11
TCCR0A |= (1 << WGM00); //WGM_0-1=01 //set OCR0B register to zero
TCCR0B = (1 << CS00) | (1 << WGM02); //WGM_2=1, CS_0-2=001 (no prescaling) OCR0B = 0;
TCCR0A |= (2 << COM0B0); //switch OC0B to OCR mode //disable OCR0B output (will be enabled in timer02_set_pwm0)
TCCR0A &= ~(2 << COM0B0);
//setup timer2 //setup timer2
TCCR2A = 0x00; //COM_A-B=00, WGM_0-1=00 TCCR2A = 0x00; //COM_A-B=00, WGM_0-1=00
TCCR2B = (4 << CS20); //WGM_2=0, CS_0-2=011 TCCR2B = (4 << CS20); //WGM_2=0, CS_0-2=011