2016-03-25 06:19:46 +00:00
|
|
|
/**
|
2016-03-24 18:01:20 +00:00
|
|
|
* Marlin 3D Printer Firmware
|
2020-02-03 14:00:57 +00:00
|
|
|
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
|
2016-03-24 18:01:20 +00:00
|
|
|
*
|
|
|
|
* Based on Sprinter and grbl.
|
2019-06-28 04:57:50 +00:00
|
|
|
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
|
2016-03-24 18:01:20 +00:00
|
|
|
*
|
|
|
|
* This program is free software: you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License as published by
|
|
|
|
* the Free Software Foundation, either version 3 of the License, or
|
|
|
|
* (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This program is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
* GNU General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU General Public License
|
2020-07-23 03:20:14 +00:00
|
|
|
* along with this program. If not, see <https://www.gnu.org/licenses/>.
|
2016-03-24 18:01:20 +00:00
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
2017-11-03 01:57:08 +00:00
|
|
|
// NOTE - the HAL version of the rrd device uses a generic ST7920 device. See the
|
|
|
|
// file u8g_dev_st7920_128x64_HAL.cpp for the HAL version.
|
2013-06-06 22:49:25 +00:00
|
|
|
|
2019-09-05 18:20:03 +00:00
|
|
|
#include "../../inc/MarlinConfigPre.h"
|
|
|
|
|
2019-12-22 22:11:17 +00:00
|
|
|
#if !defined(U8G_HAL_LINKS) && ANY(__AVR__, ARDUINO_ARCH_STM32, ARDUINO_ARCH_ESP32)
|
2019-09-02 10:45:02 +00:00
|
|
|
|
2017-11-19 19:37:33 +00:00
|
|
|
#include "../../inc/MarlinConfig.h"
|
|
|
|
|
2021-10-03 03:12:51 +00:00
|
|
|
#if IS_U8GLIB_ST7920
|
2017-06-17 23:36:10 +00:00
|
|
|
|
2018-11-13 07:47:45 +00:00
|
|
|
#include "ultralcd_st7920_u8glib_rrd_AVR.h"
|
2016-06-04 12:54:20 +00:00
|
|
|
|
2018-11-13 07:47:45 +00:00
|
|
|
// Optimize this code with -O3
|
|
|
|
#pragma GCC optimize (3)
|
|
|
|
|
2021-09-06 00:21:25 +00:00
|
|
|
#ifndef ST7920_DELAY_1
|
|
|
|
#ifndef LCD_ST7920_DELAY_1
|
|
|
|
#define LCD_ST7920_DELAY_1 0
|
|
|
|
#endif
|
|
|
|
#ifndef BOARD_ST7920_DELAY_1
|
|
|
|
#define BOARD_ST7920_DELAY_1 0
|
|
|
|
#endif
|
|
|
|
#ifndef CPU_ST7920_DELAY_1
|
|
|
|
#define CPU_ST7920_DELAY_1 0
|
|
|
|
#endif
|
|
|
|
#if LCD_ST7920_DELAY_1 || BOARD_ST7920_DELAY_1 || CPU_ST7920_DELAY_1
|
|
|
|
#define ST7920_DELAY_1 DELAY_NS(_MAX(LCD_ST7920_DELAY_1, BOARD_ST7920_DELAY_1, CPU_ST7920_DELAY_1))
|
|
|
|
#else
|
|
|
|
#define ST7920_DELAY_1
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
#ifndef ST7920_DELAY_2
|
|
|
|
#ifndef LCD_ST7920_DELAY_2
|
|
|
|
#define LCD_ST7920_DELAY_2 0
|
|
|
|
#endif
|
|
|
|
#ifndef BOARD_ST7920_DELAY_2
|
|
|
|
#define BOARD_ST7920_DELAY_2 0
|
|
|
|
#endif
|
|
|
|
#ifndef CPU_ST7920_DELAY_2
|
|
|
|
#define CPU_ST7920_DELAY_2 0
|
|
|
|
#endif
|
|
|
|
#if LCD_ST7920_DELAY_2 || BOARD_ST7920_DELAY_2 || CPU_ST7920_DELAY_2
|
|
|
|
#define ST7920_DELAY_2 DELAY_NS(_MAX(LCD_ST7920_DELAY_2, BOARD_ST7920_DELAY_2, CPU_ST7920_DELAY_2))
|
|
|
|
#else
|
|
|
|
#define ST7920_DELAY_2
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
#ifndef ST7920_DELAY_3
|
|
|
|
#ifndef LCD_ST7920_DELAY_3
|
|
|
|
#define LCD_ST7920_DELAY_3 0
|
|
|
|
#endif
|
|
|
|
#ifndef BOARD_ST7920_DELAY_3
|
|
|
|
#define BOARD_ST7920_DELAY_3 0
|
|
|
|
#endif
|
|
|
|
#ifndef CPU_ST7920_DELAY_3
|
|
|
|
#define CPU_ST7920_DELAY_3 0
|
|
|
|
#endif
|
|
|
|
#if LCD_ST7920_DELAY_3 || BOARD_ST7920_DELAY_3 || CPU_ST7920_DELAY_3
|
|
|
|
#define ST7920_DELAY_3 DELAY_NS(_MAX(LCD_ST7920_DELAY_3, BOARD_ST7920_DELAY_3, CPU_ST7920_DELAY_3))
|
|
|
|
#else
|
|
|
|
#define ST7920_DELAY_3
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
2019-07-18 10:54:50 +00:00
|
|
|
#ifdef ARDUINO_ARCH_STM32F1
|
|
|
|
#define ST7920_DAT(V) !!((V) & 0x80)
|
|
|
|
#else
|
|
|
|
#define ST7920_DAT(V) ((V) & 0x80)
|
|
|
|
#endif
|
2021-09-06 00:21:25 +00:00
|
|
|
|
2019-07-18 10:54:50 +00:00
|
|
|
#define ST7920_SND_BIT do{ \
|
|
|
|
WRITE(ST7920_CLK_PIN, LOW); ST7920_DELAY_1; \
|
|
|
|
WRITE(ST7920_DAT_PIN, ST7920_DAT(val)); ST7920_DELAY_2; \
|
|
|
|
WRITE(ST7920_CLK_PIN, HIGH); ST7920_DELAY_3; \
|
|
|
|
val <<= 1; }while(0)
|
2018-02-14 03:59:18 +00:00
|
|
|
|
2018-11-13 07:47:45 +00:00
|
|
|
// Optimize this code with -O3
|
|
|
|
#pragma GCC optimize (3)
|
|
|
|
|
|
|
|
void ST7920_SWSPI_SND_8BIT(uint8_t val) {
|
2018-02-14 03:59:18 +00:00
|
|
|
ST7920_SND_BIT; // 1
|
|
|
|
ST7920_SND_BIT; // 2
|
|
|
|
ST7920_SND_BIT; // 3
|
|
|
|
ST7920_SND_BIT; // 4
|
|
|
|
ST7920_SND_BIT; // 5
|
|
|
|
ST7920_SND_BIT; // 6
|
|
|
|
ST7920_SND_BIT; // 7
|
|
|
|
ST7920_SND_BIT; // 8
|
|
|
|
}
|
|
|
|
|
2015-10-03 06:08:58 +00:00
|
|
|
uint8_t u8g_dev_rrd_st7920_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
|
|
|
|
uint8_t i, y;
|
|
|
|
switch (msg) {
|
|
|
|
case U8G_DEV_MSG_INIT: {
|
2017-08-02 22:45:42 +00:00
|
|
|
OUT_WRITE(ST7920_CS_PIN, LOW);
|
2017-11-19 19:37:33 +00:00
|
|
|
OUT_WRITE(ST7920_DAT_PIN, LOW);
|
2018-02-14 03:59:18 +00:00
|
|
|
OUT_WRITE(ST7920_CLK_PIN, HIGH);
|
2017-08-02 22:45:42 +00:00
|
|
|
|
2015-10-03 06:08:58 +00:00
|
|
|
ST7920_CS();
|
2019-02-20 10:01:07 +00:00
|
|
|
u8g_Delay(120); // Initial delay for boot up
|
2015-10-03 06:08:58 +00:00
|
|
|
ST7920_SET_CMD();
|
2019-02-20 10:01:07 +00:00
|
|
|
ST7920_WRITE_BYTE(0x20); // Non-extended mode
|
|
|
|
ST7920_WRITE_BYTE(0x08); // Display off, cursor+blink off
|
|
|
|
ST7920_WRITE_BYTE(0x01); // Clear DDRAM ram
|
|
|
|
u8g_Delay(15); // Delay for DDRAM clear
|
|
|
|
ST7920_WRITE_BYTE(0x24); // Extended mode
|
|
|
|
ST7920_WRITE_BYTE(0x26); // Extended mode + GDRAM active
|
|
|
|
for (y = 0; y < (LCD_PIXEL_HEIGHT) / 2; y++) { // Clear GDRAM
|
|
|
|
ST7920_WRITE_BYTE(0x80 | y); // Set y
|
|
|
|
ST7920_WRITE_BYTE(0x80); // Set x = 0
|
2015-10-03 06:08:58 +00:00
|
|
|
ST7920_SET_DAT();
|
2019-02-20 10:01:07 +00:00
|
|
|
for (i = 0; i < 2 * (LCD_PIXEL_WIDTH) / 8; i++) // 2x width clears both segments
|
2018-02-14 03:59:18 +00:00
|
|
|
ST7920_WRITE_BYTE(0);
|
2013-06-06 22:49:25 +00:00
|
|
|
ST7920_SET_CMD();
|
|
|
|
}
|
2019-02-20 10:01:07 +00:00
|
|
|
ST7920_WRITE_BYTE(0x0C); // Display on, cursor+blink off
|
2015-10-03 06:08:58 +00:00
|
|
|
ST7920_NCS();
|
|
|
|
}
|
|
|
|
break;
|
2017-11-03 01:57:08 +00:00
|
|
|
|
2017-12-05 08:18:25 +00:00
|
|
|
case U8G_DEV_MSG_STOP: break;
|
|
|
|
|
|
|
|
case U8G_DEV_MSG_PAGE_NEXT: {
|
2021-03-30 01:36:37 +00:00
|
|
|
uint8_t *ptr;
|
|
|
|
u8g_pb_t *pb = (u8g_pb_t*)(dev->dev_mem);
|
2015-10-03 06:08:58 +00:00
|
|
|
y = pb->p.page_y0;
|
|
|
|
ptr = (uint8_t*)pb->buf;
|
|
|
|
|
|
|
|
ST7920_CS();
|
|
|
|
for (i = 0; i < PAGE_HEIGHT; i ++) {
|
|
|
|
ST7920_SET_CMD();
|
|
|
|
if (y < 32) {
|
2019-02-20 10:01:07 +00:00
|
|
|
ST7920_WRITE_BYTE(0x80 | y); // y
|
|
|
|
ST7920_WRITE_BYTE(0x80); // x = 0
|
2015-10-03 06:08:58 +00:00
|
|
|
}
|
|
|
|
else {
|
2019-02-20 10:01:07 +00:00
|
|
|
ST7920_WRITE_BYTE(0x80 | (y - 32)); // y
|
|
|
|
ST7920_WRITE_BYTE(0x80 | 8); // x = 64
|
2013-06-06 22:49:25 +00:00
|
|
|
}
|
2015-10-03 06:08:58 +00:00
|
|
|
ST7920_SET_DAT();
|
2019-02-20 10:01:07 +00:00
|
|
|
ST7920_WRITE_BYTES(ptr, (LCD_PIXEL_WIDTH) / 8); // ptr incremented inside of macro!
|
2015-10-03 06:08:58 +00:00
|
|
|
y++;
|
2013-06-06 22:49:25 +00:00
|
|
|
}
|
2015-10-03 06:08:58 +00:00
|
|
|
ST7920_NCS();
|
|
|
|
}
|
|
|
|
break;
|
2013-06-06 22:49:25 +00:00
|
|
|
}
|
2016-11-25 03:49:55 +00:00
|
|
|
#if PAGE_HEIGHT == 8
|
|
|
|
return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg);
|
|
|
|
#elif PAGE_HEIGHT == 16
|
|
|
|
return u8g_dev_pb16h1_base_fn(u8g, dev, msg, arg);
|
|
|
|
#else
|
|
|
|
return u8g_dev_pb32h1_base_fn(u8g, dev, msg, arg);
|
|
|
|
#endif
|
2013-06-06 22:49:25 +00:00
|
|
|
}
|
|
|
|
|
2016-03-15 08:10:57 +00:00
|
|
|
uint8_t u8g_dev_st7920_128x64_rrd_buf[(LCD_PIXEL_WIDTH) * (PAGE_HEIGHT) / 8] U8G_NOCOMMON;
|
2019-09-02 10:45:02 +00:00
|
|
|
u8g_pb_t u8g_dev_st7920_128x64_rrd_pb = { { PAGE_HEIGHT, LCD_PIXEL_HEIGHT, 0, 0, 0 }, LCD_PIXEL_WIDTH, u8g_dev_st7920_128x64_rrd_buf };
|
|
|
|
u8g_dev_t u8g_dev_st7920_128x64_rrd_sw_spi = { u8g_dev_rrd_st7920_128x64_fn, &u8g_dev_st7920_128x64_rrd_pb, &u8g_com_null_fn };
|
2013-06-06 22:49:25 +00:00
|
|
|
|
Decrease the needed nops to 1
by shitfing the left shift into the high phase.
```
2 cbi 0x2,1 ;set CLK //
1 in r18,__SREG__ //1
1-3 sbrc r24,7 //2-4
2 rjmp .L19 //4
1 cli .L19: //5
2 lds r25,258 lds r25,258 //7
1 andi r25,lo8(-2) ori r25,lo8(1) //8
2 sts 258,r25 sts 258,r25 //10
1 out __SREG__,r18 out __SREG__,r18 //11
2 .L3: rjmp .L3 //13 //2
2 sbi 0x2,1 ;reset CLK // //13-15 //2-4
1 lsl r24 ; val //1
1 nop //2
2 cbi 0x2,1 ;set CLK //4
...
```
2016-06-07 11:45:35 +00:00
|
|
|
#pragma GCC reset_options
|
2013-06-06 22:49:25 +00:00
|
|
|
|
2019-04-18 18:10:58 +00:00
|
|
|
#if ENABLED(LIGHTWEIGHT_UI)
|
|
|
|
#include "../../HAL/shared/HAL_ST7920.h"
|
|
|
|
void ST7920_cs() { ST7920_CS(); }
|
|
|
|
void ST7920_ncs() { ST7920_NCS(); }
|
|
|
|
void ST7920_set_cmd() { ST7920_SET_CMD(); }
|
|
|
|
void ST7920_set_dat() { ST7920_SET_DAT(); }
|
|
|
|
void ST7920_write_byte(const uint8_t val) { ST7920_WRITE_BYTE(val); }
|
|
|
|
#endif
|
|
|
|
|
2021-10-03 03:12:51 +00:00
|
|
|
#endif // IS_U8GLIB_ST7920
|
2020-02-23 03:36:12 +00:00
|
|
|
#endif // !U8G_HAL_LINKS && (__AVR__ || ARDUINO_ARCH_STM32 || ARDUINO_ARCH_ESP32)
|